CLKMGR_MAINPLL_PLLGLOB (reference) in projects: Zephyr-Core-3.6.0

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Searched refs:CLKMGR_MAINPLL_PLLGLOB (Results 1 – 4 of 4) sorted by relevance

/Zephyr-Core-3.6.0/drivers/clock_control/
D	clock_control_agilex5_ll.h	`27 #define CLKMGR_MAINPLL_PLLGLOB 0x24 macro`
D	clock_agilex_ll.c	`65 pllglob_reg = CLKMGR_MAINPLL + CLKMGR_MAINPLL_PLLGLOB; in get_clk_freq()`
D	clock_control_agilex5_ll.c	`93 pllglob_reg = clock_agilex5_ll.mainpll_addr + CLKMGR_MAINPLL_PLLGLOB; in get_clk_freq()`
/Zephyr-Core-3.6.0/include/zephyr/drivers/clock_control/
D	clock_agilex_ll.h	`26 #define CLKMGR_MAINPLL_PLLGLOB 0x24 macro`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
Zephyr-Core-3.4.0
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