1 /* 2 * Copyright (c) 2022 Henrik Brix Andersen <henrik@brixandersen.dk> 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 /** 8 * @file 9 * @brief API for NXP SJA1000 (and compatible) CAN controller frontend drivers. 10 */ 11 12 #ifndef ZEPHYR_INCLUDE_DRIVERS_CAN_CAN_SJA1000_H_ 13 #define ZEPHYR_INCLUDE_DRIVERS_CAN_CAN_SJA1000_H_ 14 15 #include <zephyr/drivers/can.h> 16 17 /** 18 * @name SJA1000 Output Control Register (OCR) bits 19 * 20 * @{ 21 */ 22 #define CAN_SJA1000_OCR_OCMODE_MASK GENMASK(1, 0) 23 #define CAN_SJA1000_OCR_OCPOL0 BIT(2) 24 #define CAN_SJA1000_OCR_OCTN0 BIT(3) 25 #define CAN_SJA1000_OCR_OCTP0 BIT(4) 26 #define CAN_SJA1000_OCR_OCPOL1 BIT(5) 27 #define CAN_SJA1000_OCR_OCTN1 BIT(6) 28 #define CAN_SJA1000_OCR_OCTP1 BIT(7) 29 30 #define CAN_SJA1000_OCR_OCMODE_BIPHASE FIELD_PREP(CAN_SJA1000_OCR_OCMODE_MASK, 0U) 31 #define CAN_SJA1000_OCR_OCMODE_TEST FIELD_PREP(CAN_SJA1000_OCR_OCMODE_MASK, 1U) 32 #define CAN_SJA1000_OCR_OCMODE_NORMAL FIELD_PREP(CAN_SJA1000_OCR_OCMODE_MASK, 2U) 33 #define CAN_SJA1000_OCR_OCMODE_CLOCK FIELD_PREP(CAN_SJA1000_OCR_OCMODE_MASK, 3U) 34 35 /** @} */ 36 37 /** 38 * @name SJA1000 Clock Divider Register (CDR) bits 39 * 40 * @{ 41 */ 42 #define CAN_SJA1000_CDR_CD_MASK GENMASK(2, 0) 43 #define CAN_SJA1000_CDR_CLOCK_OFF BIT(3) 44 #define CAN_SJA1000_CDR_RXINTEN BIT(5) 45 #define CAN_SJA1000_CDR_CBP BIT(6) 46 #define CAN_SJA1000_CDR_CAN_MODE BIT(7) 47 48 #define CAN_SJA1000_CDR_CD_DIV1 FIELD_PREP(CAN_SJA1000_CDR_CD_MASK, 7U) 49 #define CAN_SJA1000_CDR_CD_DIV2 FIELD_PREP(CAN_SJA1000_CDR_CD_MASK, 0U) 50 #define CAN_SJA1000_CDR_CD_DIV4 FIELD_PREP(CAN_SJA1000_CDR_CD_MASK, 1U) 51 #define CAN_SJA1000_CDR_CD_DIV6 FIELD_PREP(CAN_SJA1000_CDR_CD_MASK, 2U) 52 #define CAN_SJA1000_CDR_CD_DIV8 FIELD_PREP(CAN_SJA1000_CDR_CD_MASK, 3U) 53 #define CAN_SJA1000_CDR_CD_DIV10 FIELD_PREP(CAN_SJA1000_CDR_CD_MASK, 4U) 54 #define CAN_SJA1000_CDR_CD_DIV12 FIELD_PREP(CAN_SJA1000_CDR_CD_MASK, 5U) 55 #define CAN_SJA1000_CDR_CD_DIV14 FIELD_PREP(CAN_SJA1000_CDR_CD_MASK, 6U) 56 57 /** @} */ 58 59 /** 60 * @brief SJA1000 specific static initializer for a minimum @p can_timing struct 61 */ 62 #define CAN_SJA1000_TIMING_MIN_INITIALIZER \ 63 { \ 64 .sjw = 1, \ 65 .prop_seg = 0, \ 66 .phase_seg1 = 1, \ 67 .phase_seg2 = 1, \ 68 .prescaler = 1 \ 69 } 70 71 /** 72 * @brief SJA1000 specific static initializer for a maximum @p can_timing struct 73 */ 74 #define CAN_SJA1000_TIMING_MAX_INITIALIZER \ 75 { \ 76 .sjw = 4, \ 77 .prop_seg = 0, \ 78 .phase_seg1 = 16, \ 79 .phase_seg2 = 8, \ 80 .prescaler = 64 \ 81 } 82 83 /** 84 * @brief SJA1000 driver front-end callback for writing a register value 85 * 86 * @param dev Pointer to the device structure for the driver instance. 87 * @param reg Register offset 88 * @param val Register value 89 */ 90 typedef void (*can_sja1000_write_reg_t)(const struct device *dev, uint8_t reg, uint8_t val); 91 92 /** 93 * @brief SJA1000 driver front-end callback for reading a register value 94 * 95 * @param dev Pointer to the device structure for the driver instance. 96 * @param reg Register offset 97 * @retval Register value 98 */ 99 typedef uint8_t (*can_sja1000_read_reg_t)(const struct device *dev, uint8_t reg); 100 101 /** 102 * @brief SJA1000 driver internal configuration structure. 103 */ 104 struct can_sja1000_config { 105 const struct can_driver_config common; 106 can_sja1000_read_reg_t read_reg; 107 can_sja1000_write_reg_t write_reg; 108 uint32_t sjw; 109 uint32_t phase_seg1; 110 uint32_t phase_seg2; 111 uint8_t ocr; 112 uint8_t cdr; 113 const void *custom; 114 }; 115 116 /** 117 * @brief Static initializer for @p can_sja1000_config struct 118 * 119 * @param node_id Devicetree node identifier 120 * @param _custom Pointer to custom driver frontend configuration structure 121 * @param _read_reg Driver frontend SJA100 register read function 122 * @param _write_reg Driver frontend SJA100 register write function 123 * @param _ocr Initial SJA1000 Output Control Register (OCR) value 124 * @param _cdr Initial SJA1000 Clock Divider Register (CDR) value 125 */ 126 #define CAN_SJA1000_DT_CONFIG_GET(node_id, _custom, _read_reg, _write_reg, _ocr, _cdr) \ 127 { \ 128 .common = CAN_DT_DRIVER_CONFIG_GET(node_id, 1000000), \ 129 .read_reg = _read_reg, \ 130 .write_reg = _write_reg, \ 131 .sjw = DT_PROP(node_id, sjw), \ 132 .phase_seg1 = DT_PROP_OR(node_id, phase_seg1, 0), \ 133 .phase_seg2 = DT_PROP_OR(node_id, phase_seg2, 0), \ 134 .ocr = _ocr, \ 135 .cdr = _cdr, \ 136 .custom = _custom, \ 137 } 138 139 /** 140 * @brief Static initializer for @p can_sja1000_config struct from a DT_DRV_COMPAT instance 141 * 142 * @param inst DT_DRV_COMPAT instance number 143 * @param _custom Pointer to custom driver frontend configuration structure 144 * @param _read_reg Driver frontend SJA100 register read function 145 * @param _write_reg Driver frontend SJA100 register write function 146 * @param _ocr Initial SJA1000 Output Control Register (OCR) value 147 * @param _cdr Initial SJA1000 Clock Divider Register (CDR) value 148 * @see CAN_SJA1000_DT_CONFIG_GET() 149 */ 150 #define CAN_SJA1000_DT_CONFIG_INST_GET(inst, _custom, _read_reg, _write_reg, _ocr, _cdr) \ 151 CAN_SJA1000_DT_CONFIG_GET(DT_DRV_INST(inst), _custom, _read_reg, _write_reg, _ocr, _cdr) 152 153 /** 154 * @brief SJA1000 driver internal RX filter structure. 155 */ 156 struct can_sja1000_rx_filter { 157 struct can_filter filter; 158 can_rx_callback_t callback; 159 void *user_data; 160 }; 161 162 /** 163 * @brief SJA1000 driver internal data structure. 164 */ 165 struct can_sja1000_data { 166 struct can_driver_data common; 167 ATOMIC_DEFINE(rx_allocs, CONFIG_CAN_MAX_FILTER); 168 struct can_sja1000_rx_filter filters[CONFIG_CAN_MAX_FILTER]; 169 struct k_mutex mod_lock; 170 enum can_state state; 171 struct k_sem tx_idle; 172 can_tx_callback_t tx_callback; 173 void *tx_user_data; 174 void *custom; 175 }; 176 177 /** 178 * @brief Initializer for a @a can_sja1000_data struct 179 * @param _custom Pointer to custom driver frontend data structure 180 */ 181 #define CAN_SJA1000_DATA_INITIALIZER(_custom) \ 182 { \ 183 .custom = _custom, \ 184 } 185 186 /** 187 * @brief SJA1000 callback API upon setting CAN bus timing 188 * See @a can_set_timing() for argument description 189 */ 190 int can_sja1000_set_timing(const struct device *dev, const struct can_timing *timing); 191 192 /** 193 * @brief SJA1000 callback API upon getting CAN controller capabilities 194 * See @a can_get_capabilities() for argument description 195 */ 196 int can_sja1000_get_capabilities(const struct device *dev, can_mode_t *cap); 197 198 /** 199 * @brief SJA1000 callback API upon starting CAN controller 200 * See @a can_start() for argument description 201 */ 202 int can_sja1000_start(const struct device *dev); 203 204 /** 205 * @brief SJA1000 callback API upon stopping CAN controller 206 * See @a can_stop() for argument description 207 */ 208 int can_sja1000_stop(const struct device *dev); 209 210 /** 211 * @brief SJA1000 callback API upon setting CAN controller mode 212 * See @a can_set_mode() for argument description 213 */ 214 int can_sja1000_set_mode(const struct device *dev, can_mode_t mode); 215 216 /** 217 * @brief SJA1000 callback API upon sending a CAN frame 218 * See @a can_send() for argument description 219 */ 220 int can_sja1000_send(const struct device *dev, const struct can_frame *frame, k_timeout_t timeout, 221 can_tx_callback_t callback, void *user_data); 222 223 /** 224 * @brief SJA1000 callback API upon adding an RX filter 225 * See @a can_add_rx_callback() for argument description 226 */ 227 int can_sja1000_add_rx_filter(const struct device *dev, can_rx_callback_t callback, void *user_data, 228 const struct can_filter *filter); 229 230 /** 231 * @brief SJA1000 callback API upon removing an RX filter 232 * See @a can_remove_rx_filter() for argument description 233 */ 234 void can_sja1000_remove_rx_filter(const struct device *dev, int filter_id); 235 236 #ifndef CONFIG_CAN_AUTO_BUS_OFF_RECOVERY 237 /** 238 * @brief SJA1000 callback API upon recovering the CAN bus 239 * See @a can_recover() for argument description 240 */ 241 int can_sja1000_recover(const struct device *dev, k_timeout_t timeout); 242 #endif /* !CONFIG_CAN_AUTO_BUS_OFF_RECOVERY */ 243 244 /** 245 * @brief SJA1000 callback API upon getting the CAN controller state 246 * See @a can_get_state() for argument description 247 */ 248 int can_sja1000_get_state(const struct device *dev, enum can_state *state, 249 struct can_bus_err_cnt *err_cnt); 250 251 /** 252 * @brief SJA1000 callback API upon setting a state change callback 253 * See @a can_set_state_change_callback() for argument description 254 */ 255 void can_sja1000_set_state_change_callback(const struct device *dev, 256 can_state_change_callback_t callback, void *user_data); 257 258 /** 259 * @brief SJA1000 callback API upon getting the maximum number of concurrent CAN RX filters 260 * See @a can_get_max_filters() for argument description 261 */ 262 int can_sja1000_get_max_filters(const struct device *dev, bool ide); 263 264 /** 265 * @brief SJA1000 IRQ handler callback. 266 * 267 * @param dev Pointer to the device structure for the driver instance. 268 */ 269 void can_sja1000_isr(const struct device *dev); 270 271 /** 272 * @brief SJA1000 driver initialization callback. 273 * 274 * @param dev Pointer to the device structure for the driver instance. 275 */ 276 int can_sja1000_init(const struct device *dev); 277 278 #endif /* ZEPHYR_INCLUDE_DRIVERS_CAN_CAN_SJA1000_H_ */ 279
