1 /*
2 * Copyright (c) 2021 Intel Corporation
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #include <zephyr/ztest.h>
8 #include <zephyr/tc_util.h>
9
10 #include <zephyr/drivers/pcie/pcie.h>
11 #include <ibecc.h>
12
13 #define CONFIG_EDAC_LOG_LEVEL LOG_LEVEL_DBG
14
mock_sys_in8(io_port_t port)15 static uint8_t mock_sys_in8(io_port_t port)
16 {
17 /* Needed for NMI handling simulation */
18 if (port == NMI_STS_CNT_REG) {
19 TC_PRINT("Simulate sys_in8(NMI_STS_CNT_REG)=>SERR\n");
20 return NMI_STS_SRC_SERR;
21 }
22
23 TC_PRINT("Simulate sys_in8(0x%x)=>0\n", port);
24
25 return 0;
26 }
27
mock_sys_out8(uint8_t data,io_port_t port)28 static void mock_sys_out8(uint8_t data, io_port_t port)
29 {
30 TC_PRINT("Simulate sys_out8() NOP\n");
31 }
32
mock_sys_read64(uint64_t addr)33 static uint64_t mock_sys_read64(uint64_t addr)
34 {
35 #if defined(IBECC_ENABLED)
36 if (addr == IBECC_ECC_ERROR_LOG) {
37 TC_PRINT("Simulate sys_read64(IBECC_ECC_ERROR_LOG)=>CERRSTS\n");
38 return ECC_ERROR_CERRSTS;
39 }
40
41 if (addr == IBECC_PARITY_ERROR_LOG) {
42 TC_PRINT("Simulate sys_read64(IBECC_PARITY_ERROR_LOG)=>1\n");
43 return 1;
44 }
45 #endif /* IBECC_ENABLED */
46
47 TC_PRINT("Simulate sys_read64(0x%llx)=>0\n", addr);
48
49 return 0;
50 }
51
mock_sys_write64(uint64_t data,uint64_t reg)52 static void mock_sys_write64(uint64_t data, uint64_t reg)
53 {
54 TC_PRINT("Simulate sys_write64() NOP\n");
55 }
56
mock_conf_write(pcie_bdf_t bdf,unsigned int reg,uint32_t data)57 static void mock_conf_write(pcie_bdf_t bdf, unsigned int reg, uint32_t data)
58 {
59 TC_PRINT("Simulate pcie_conf_write() NOP\n");
60 }
61
mock_conf_read(pcie_bdf_t bdf,unsigned int reg)62 static uint32_t mock_conf_read(pcie_bdf_t bdf, unsigned int reg)
63 {
64 #if defined(EMULATE_SKU)
65 if (bdf == PCI_HOST_BRIDGE && reg == PCIE_CONF_ID) {
66 TC_PRINT("Simulate PCI device, SKU 0x%x\n", EMULATE_SKU);
67
68 return EMULATE_SKU;
69 }
70 #endif /* EMULATE_SKU */
71
72 #if defined(IBECC_ENABLED)
73 if (bdf == PCI_HOST_BRIDGE && reg == CAPID0_C_REG) {
74 TC_PRINT("Simulate IBECC enabled\n");
75
76 return CAPID0_C_IBECC_ENABLED;
77 }
78 #endif /* IBECC_ENABLED */
79
80 TC_PRINT("Simulate pcie_conf_read()=>0\n");
81
82 return 0;
83 }
84
85 /* Redefine PCIE access */
86 #define pcie_conf_read(bdf, reg) mock_conf_read(bdf, reg)
87 #define pcie_conf_write(bdf, reg, val) mock_conf_write(bdf, reg, val)
88
89 /* Redefine sys_in function */
90 #define sys_in8(port) mock_sys_in8(port)
91 #define sys_out8(data, port) mock_sys_out8(data, port)
92 #define sys_read64(addr) mock_sys_read64(addr)
93 #define sys_write64(data, addr) mock_sys_write64(data, addr)
94
95 /* Include source code to test some static functions */
96 #include "edac_ibecc.c"
97
ZTEST(ibecc_cov,test_static_functions)98 ZTEST(ibecc_cov, test_static_functions)
99 {
100 const struct device *const dev = DEVICE_DT_GET(DEVICE_NODE);
101 struct ibecc_error error_data;
102 uint64_t log_data;
103 int ret;
104
105 TC_PRINT("Start testing static functions\n");
106
107 zassert_not_null(dev, "Device not found");
108
109 /* Catch failed PCIE probe case */
110 ret = edac_ibecc_init(dev);
111 zassert_equal(ret, -ENODEV, "");
112
113 ret = edac_ecc_error_log_get(dev, &log_data);
114 if (IS_ENABLED(IBECC_ENABLED)) {
115 zassert_equal(ret, 0, "");
116 } else {
117 zassert_equal(ret, -ENODATA, "");
118 }
119
120 ret = edac_parity_error_log_get(dev, &log_data);
121 if (IS_ENABLED(IBECC_ENABLED)) {
122 zassert_equal(ret, 0, "");
123 } else {
124 zassert_equal(ret, -ENODATA, "");
125 }
126
127 /* Catch passing zero errlog case */
128 parse_ecclog(dev, 0, &error_data);
129
130 /* Test errsts clear not set case */
131 ibecc_errsts_clear(PCI_HOST_BRIDGE);
132
133 /* Test errcmd clear case */
134 ibecc_errcmd_setup(PCI_HOST_BRIDGE, false);
135 }
136
ZTEST(ibecc_cov,test_trigger_nmi_handler)137 ZTEST(ibecc_cov, test_trigger_nmi_handler)
138 {
139 bool ret;
140
141 ret = z_x86_do_kernel_nmi(NULL);
142 zassert_true(ret, "Test NMI handling");
143 }
144
145 ZTEST_SUITE(ibecc_cov, NULL, NULL, NULL, NULL, NULL);
146
