/Zephyr-Core-3.5.0/tests/boot/test_mcuboot/ |
D | sysbuild.cmake | 4 # Add the mcuboot key file to the secondary swapped app 6 # both the primary and secondary apps 23 # iterations, the MCUBoot swap won't be triggered until the secondary app
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/Zephyr-Core-3.5.0/soc/arm64/arm/fvp_aemv8r/ |
D | Kconfig.soc | 21 FVP_BaseR_AEMv8R. When zephyr kernel try to bring up secondary 23 it indeed bring up secondary core successfully.
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/Zephyr-Core-3.5.0/samples/boards/qomu/ |
D | qomu.overlay | 7 pin-secondary-config = <0x1d>;
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/Zephyr-Core-3.5.0/samples/drivers/ipm/ipm_mcux/ |
D | Kconfig | 11 needs to be aware of size or base address of secondary image
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/Zephyr-Core-3.5.0/samples/subsys/ipc/openamp/ |
D | Kconfig | 11 needs to be aware of size or base address of secondary image
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/Zephyr-Core-3.5.0/drivers/counter/ |
D | Kconfig.stm32_rtc | 30 Deprecated in favor of device tree secondary domain clock 37 Deprecated in favor of device tree secondary domain clock
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/Zephyr-Core-3.5.0/drivers/pcie/host/ |
D | pcie.c | 407 uint32_t secondary = 0; in scan_dev() local 425 secondary = PCIE_BUS_SECONDARY_NUMBER(num); in scan_dev() 437 if (scan_flag(opt, PCIE_SCAN_RECURSIVE) && secondary != 0) { in scan_dev() 438 if (!scan_bus(secondary, opt)) { in scan_dev()
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/Zephyr-Core-3.5.0/subsys/mgmt/mcumgr/grp/img_mgmt/ |
D | Kconfig | 51 Sets how many application images are supported (pairs of secondary and primary slots). 66 bool "Allow to confirm secondary slot of non-active image" 69 Allows to confirm secondary (non-active) slot of non-active image. 89 Allows erasing secondary slot which is marked for test or confirmed; this allows 103 behaviour is, when image is not selected, to upload to image that represents secondary
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/Zephyr-Core-3.5.0/samples/application_development/code_relocation_nocopy/ |
D | linker_arm_nocopy.ld | 32 * Add another fake portion of FLASH to simulate a secondary or external FLASH
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/Zephyr-Core-3.5.0/samples/subsys/ipc/openamp/remote/boards/ |
D | mimxrt1170_evk_cm4.overlay | 40 /* Enable secondary LPUART */
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D | mimxrt1170_evkb_cm4.overlay | 40 /* Enable secondary LPUART */
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D | mimxrt1160_evk_cm4.overlay | 40 /* Enable secondary LPUART */
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/Zephyr-Core-3.5.0/subsys/net/lib/lwm2m/ |
D | Kconfig.ucifi | 68 int "Maximum # of secondary network addresses" 72 This value sets the maximum number of secondary addresses used to
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/Zephyr-Core-3.5.0/dts/arm/quicklogic/ |
D | quicklogic_eos_s3.dtsi | 64 pin-secondary-config = <0x00>;
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/Zephyr-Core-3.5.0/boards/arm/96b_carbon_nrf51/doc/ |
D | index.rst | 9 This is the secondary nRF51822 chip on the 96Boards Carbon and provides 16 unless they want to reprogram the secondary chip which provides 139 Bluetooth functionality from the secondary nRF51822 chip to the
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/Zephyr-Core-3.5.0/doc/kernel/usermode/ |
D | mpu_userspace.rst | 6 The MPU backed userspace implementation requires the creation of a secondary
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/Zephyr-Core-3.5.0/doc/services/tfm/ |
D | integration.rst | 78 * 0x0018_0000 Secure image secondary slot (0.5 MB) 79 * 0x0020_0000 Non-secure image secondary slot (0.5 MB)
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/Zephyr-Core-3.5.0/modules/ |
D | Kconfig.mcuboot | 154 to DFU its own update to secondary slot and all updates need to 173 MCUboot swaps application from the secondary slot to the primary 182 MCUboot will take contents of secondary slot of an image and will 185 as it is not stored in the secondary slot. 187 that the overwrite will not happen unless the version of secondary
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/Zephyr-Core-3.5.0/samples/boards/nrf/mesh/onoff-app/ |
D | README.rst | 21 the secondary elements will appear at 0x101, 0x102 and 0x103. 82 health, and onoff. The secondary elements only
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/Zephyr-Core-3.5.0/boards/arm/thingy53_nrf5340/doc/ |
D | index.rst | 18 * a secondary Arm Cortex-M33 core, with a reduced feature set, running at
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/Zephyr-Core-3.5.0/subsys/usb/device/class/dfu/ |
D | usb_dfu.c | 152 USBD_DEVICE_DESCR_DEFINE(secondary) 263 USBD_STRING_DESCR_DEFINE(secondary) 309 USBD_TERM_DESCR_DEFINE(secondary) struct usb_desc_header term_descr = {
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/Zephyr-Core-3.5.0/tests/bsim/bluetooth/mesh/src/ |
D | test_beacon.c | 36 uint8_t secondary[16]; member 732 err = bt_mesh_k3(net_key_pairs[i].secondary, expected_net_id); in beacon_confirm_all_subnets() 780 err = bt_mesh_k3(net_key_pairs[i].secondary, net_id_secondary); in test_tx_multiple_netkeys() 800 beacon_create(&buf, net_key_pairs[i].secondary, 0x01, 0x0000); in test_tx_multiple_netkeys() 824 beacon_create(&buf, net_key_pairs[i].secondary, 0x00, 0x0000); in test_tx_multiple_netkeys() 872 net_key_pairs[i].secondary, &status); in test_rx_multiple_netkeys()
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/Zephyr-Core-3.5.0/doc/services/device_mgmt/smp_groups/ |
D | smp_group_1.rst | 34 consist of two "slots", further named "primary" and "secondary"; the application 36 uploaded to the "secondary slot"; the mcuboot is responsible in swapping 162 | | one) = 0 and secondary (for DFU dual-bank purposes) = 1. | 517 :c:enum:`MGMT_ERR_EBADSTATE`, which means that the secondary
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/Zephyr-Core-3.5.0/boards/arm/nrf5340_audio_dk_nrf5340/doc/ |
D | index.rst | 49 * A secondary Arm Cortex-M33 core, with a reduced feature set,
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/Zephyr-Core-3.5.0/boards/arm/mimxrt1160_evk/doc/ |
D | index.rst | 254 The secondary core can be debugged normally in single core builds 256 secondary core should be placed into a loop, then a debugger can be attached
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