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Searched refs:rslt (Results 1 – 5 of 5) sorted by relevance

/Zephyr-Core-3.5.0/drivers/clock_control/
Dclock_control_ifx_cat1.c174 cy_rslt_t rslt; in _configure_path_mux() local
178 rslt = cyhal_clock_reserve(clock_obj, reserve_obj); in _configure_path_mux()
180 if (rslt == CY_RSLT_SUCCESS) { in _configure_path_mux()
181 rslt = cyhal_clock_set_source(clock_obj, clock_source_obj); in _configure_path_mux()
184 return rslt; in _configure_path_mux()
192 cy_rslt_t rslt; in _configure_clk_hf() local
194 rslt = cyhal_clock_reserve(clock_obj, reserve_obj); in _configure_clk_hf()
196 if (rslt == CY_RSLT_SUCCESS) { in _configure_clk_hf()
197 rslt = cyhal_clock_set_source(clock_obj, clock_source_obj); in _configure_clk_hf()
200 if (rslt == CY_RSLT_SUCCESS) { in _configure_clk_hf()
[all …]
/Zephyr-Core-3.5.0/drivers/flash/
Dflash_ifx_cat1.c58 cy_rslt_t rslt = CY_RSLT_SUCCESS; in ifx_cat1_flash_read() local
63 rslt = cyhal_flash_read(&dev_data->flash_obj, read_offset, (uint8_t *)data, data_len); in ifx_cat1_flash_read()
64 if (rslt != CY_RSLT_SUCCESS) { in ifx_cat1_flash_read()
65 LOG_ERR("Error reading @ 0x%x (Err:0x%x)", read_offset, rslt); in ifx_cat1_flash_read()
82 cy_rslt_t rslt = CY_RSLT_SUCCESS; in ifx_cat1_flash_write() local
96 rslt = cyhal_flash_write(&dev_data->flash_obj, write_offset, in ifx_cat1_flash_write()
98 if (rslt != CY_RSLT_SUCCESS) { in ifx_cat1_flash_write()
99 LOG_ERR("Error in writing @ 0x%x (Err:0x%x)", write_offset, rslt); in ifx_cat1_flash_write()
119 cy_rslt_t rslt; in ifx_cat1_flash_erase() local
130 rslt = cyhal_flash_erase(&data->flash_obj, erase_offset); in ifx_cat1_flash_erase()
[all …]
/Zephyr-Core-3.5.0/drivers/counter/
Dcounter_ifx_cat1.c140 cy_rslt_t rslt; in ifx_cat1_counter_init() local
155 rslt = cyhal_timer_init_cfg(&data->counter_obj, &timer_configurator); in ifx_cat1_counter_init()
156 if (rslt != CY_RSLT_SUCCESS) { in ifx_cat1_counter_init()
170 rslt = cyhal_timer_configure(&data->counter_obj, &data->counter_cfg); in ifx_cat1_counter_init()
171 if (rslt != CY_RSLT_SUCCESS) { in ifx_cat1_counter_init()
177 rslt = cyhal_timer_set_frequency(&data->counter_obj, config->counter_info.freq); in ifx_cat1_counter_init()
178 if (rslt != CY_RSLT_SUCCESS) { in ifx_cat1_counter_init()
182 rslt = cyhal_gpio_init(config->external_pin, CYHAL_GPIO_DIR_INPUT, in ifx_cat1_counter_init()
184 if (rslt != CY_RSLT_SUCCESS) { in ifx_cat1_counter_init()
189 rslt = cyhal_gpio_enable_output(config->external_pin, CYHAL_SIGNAL_TYPE_EDGE, in ifx_cat1_counter_init()
[all …]
/Zephyr-Core-3.5.0/drivers/i2c/
Di2c_ifx_cat1.c172 cy_rslt_t rslt; in ifx_cat1_i2c_configure() local
205 rslt = cyhal_i2c_configure(&data->obj, &data->cfg); in ifx_cat1_i2c_configure()
206 if (rslt != CY_RSLT_SUCCESS) { in ifx_cat1_i2c_configure()
207 LOG_ERR("cyhal_i2c_configure failed with err 0x%x", rslt); in ifx_cat1_i2c_configure()
261 cy_rslt_t rslt = CY_RSLT_SUCCESS; in ifx_cat1_i2c_transfer() local
319 rslt = cyhal_i2c_master_transfer_async(&data->obj, addr, in ifx_cat1_i2c_transfer()
325 if (rslt != CY_RSLT_SUCCESS) { in ifx_cat1_i2c_transfer()
355 rslt = cyhal_i2c_master_write(&data->obj, in ifx_cat1_i2c_transfer()
359 rslt = cyhal_i2c_master_read(&data->obj, in ifx_cat1_i2c_transfer()
363 if (rslt != CY_RSLT_SUCCESS) { in ifx_cat1_i2c_transfer()
/Zephyr-Core-3.5.0/drivers/ieee802154/
Dieee802154_kw41z.c502 int rslt; in kw41z_rx() local
561 rslt = net_recv_data(kw41z->iface, pkt); in kw41z_rx()
562 if (rslt < 0) { in kw41z_rx()
563 LOG_ERR("RCV Packet dropped by NET stack: %d", rslt); in kw41z_rx()