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Searched refs:regblock_size (Results 1 – 8 of 8) sorted by relevance

/Zephyr-Core-3.5.0/soc/xtensa/intel_adsp/common/include/
Dintel_adsp_hda.h32 #define HDA_ADDR(base, regblock_size, stream) ((base) + (stream)*(regblock_size)) argument
35 #define DGCS(base, regblock_size, stream) \ argument
36 ((volatile uint32_t *)HDA_ADDR(base, regblock_size, stream))
53 #define DGBBA(base, regblock_size, stream) \ argument
54 ((volatile uint32_t *)(HDA_ADDR(base, regblock_size, stream) + 0x04))
57 #define DGBS(base, regblock_size, stream) \ argument
58 ((volatile uint32_t *)(HDA_ADDR(base, regblock_size, stream) + 0x08))
61 #define DGBFPI(base, regblock_size, stream) \ argument
62 ((volatile uint32_t *)(HDA_ADDR(base, regblock_size, stream) + 0x0c))
65 #define DGBRP(base, regblock_size, stream) \ argument
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/Zephyr-Core-3.5.0/drivers/dma/
Ddma_intel_adsp_hda.c49 res = intel_adsp_hda_set_buffer(cfg->base, cfg->regblock_size, channel, buf, in intel_adsp_hda_dma_host_in_config()
53 *DGMBS(cfg->base, cfg->regblock_size, channel) = in intel_adsp_hda_dma_host_in_config()
56 intel_adsp_hda_set_sample_container_size(cfg->base, cfg->regblock_size, channel, in intel_adsp_hda_dma_host_in_config()
84 res = intel_adsp_hda_set_buffer(cfg->base, cfg->regblock_size, channel, buf, in intel_adsp_hda_dma_host_out_config()
88 *DGMBS(cfg->base, cfg->regblock_size, channel) = in intel_adsp_hda_dma_host_out_config()
91 intel_adsp_hda_set_sample_container_size(cfg->base, cfg->regblock_size, channel, in intel_adsp_hda_dma_host_out_config()
117 res = intel_adsp_hda_set_buffer(cfg->base, cfg->regblock_size, channel, buf, in intel_adsp_hda_dma_link_in_config()
120 intel_adsp_hda_set_sample_container_size(cfg->base, cfg->regblock_size, channel, in intel_adsp_hda_dma_link_in_config()
148 res = intel_adsp_hda_set_buffer(cfg->base, cfg->regblock_size, channel, buf, in intel_adsp_hda_dma_link_out_config()
151 intel_adsp_hda_set_sample_container_size(cfg->base, cfg->regblock_size, channel, in intel_adsp_hda_dma_link_out_config()
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Ddma_intel_adsp_hda_link_in.c30 .regblock_size = DT_INST_REG_SIZE(inst), \
Ddma_intel_adsp_hda_link_out.c30 .regblock_size = DT_INST_REG_SIZE(inst), \
Ddma_intel_adsp_hda_host_in.c28 .regblock_size = DT_INST_REG_SIZE(inst), \
Ddma_intel_adsp_hda_host_out.c32 .regblock_size = DT_INST_REG_SIZE(inst), \
Ddma_intel_adsp_hda.h27 uint32_t regblock_size; member
/Zephyr-Core-3.5.0/tests/boards/intel_adsp/hda/src/
Dtests.h23 #define hda_dump_regs(stream_set, regblock_size, stream_id, ...) \ argument
26 regblock_size, stream_id)
28 #define hda_dump_regs(stream_set, regblock_size, stream_id, msg, ...) do {} while (0) argument