| /Zephyr-Core-3.5.0/arch/arc/core/ |
| D | userspace.S | 21 mov_s r5, 0
68 pop r5
72 st.aw r0, [r5, -4]
73 st.aw r1, [r5, -4]
74 st.aw r2, [r5, -4]
75 st.aw r3, [r5, -4]
100 add r5, r4, r5
105 mov_s sp, r5
112 mov r5, sp /* skip r0, r1, r2, r3 */
124 cmp r4, r5
[all …]
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| D | fatal.c | 30 esf->r4, esf->r5, esf->r6, esf->r7); in dump_arc_esf()
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| /Zephyr-Core-3.5.0/soc/arm/nxp_lpc/lpc54xxx/gcc/ |
| D | startup_LPC54114_cm4.S | 42 movs r5, 1
58 mov r4, r5 /* Set flag for master core (1) */
66 ands r3, r3, r5 /* r3 = (Bit 0: 1 = M4 is master, 0 = M4 is slave) */
96 mov sp, r5 /* Will force exception if something happens */
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| /Zephyr-Core-3.5.0/arch/nios2/core/ |
| D | swap.S | 69 movhi r5, %hi(_k_neg_eagain)
70 ori r5, r5, %lo(_k_neg_eagain)
71 ldw r4, (r5)
159 ldw r5, 4(sp)
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| D | exception.S | 46 stw r5, __z_arch_esf_t_r5_OFFSET(sp)
200 ldw r5, __z_arch_esf_t_estatus_OFFSET(sp)
201 wrctl estatus, r5
209 ldw r5, __z_arch_esf_t_r5_OFFSET(sp)
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| D | fatal.c | 29 esf->r5, esf->r6, esf->r7, esf->r8); in z_nios2_fatal_error()
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| /Zephyr-Core-3.5.0/arch/arm/core/ |
| D | userspace.S | 415 push {r4,r5}
425 push {r4,r5}
460 push {r4,r5,ip,lr}
466 push {r4,r5,ip}
645 push {r0, r1, r2, r4, r5, lr}
662 ldrb r5, [r0, r3]
666 cmp r5, #0
676 cmp r5, #0
679 cbz r5, strlen_done
702 pop {r4, r5, pc}
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| /Zephyr-Core-3.5.0/arch/arm/core/cortex_m/ |
| D | coredump.c | 28 uint32_t r5; member
80 arch_blk.r.r5 = esf->extra_info.callee->v2; in arch_coredump_info_dump()
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| D | swap_helper.S | 91 mov r5, r10
249 mov r10, r5
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| /Zephyr-Core-3.5.0/boards/arm/kv260_r5/ |
| D | kv260_r5.dts | 13 compatible = "xlnx,zynqmp-r5";
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| /Zephyr-Core-3.5.0/boards/arm/qemu_cortex_r5/ |
| D | board.cmake | 8 set(QEMU_CPU_TYPE_${ARCH} cortex-r5)
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| /Zephyr-Core-3.5.0/include/zephyr/arch/arm64/ |
| D | syscall.h | 49 register uint64_t r5 __asm__("x5") = arg6; in arch_syscall_invoke6()
56 "r" (r4), "r" (r5), "r" (r8) in arch_syscall_invoke6()
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| /Zephyr-Core-3.5.0/include/zephyr/arch/arc/ |
| D | syscall.h | 50 register uint32_t r5 __asm__("r5") = arg6; in arch_syscall_invoke6()
60 "r" (r4), "r" (r5), "r" (r6)); in arch_syscall_invoke6()
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| /Zephyr-Core-3.5.0/arch/arc/include/ |
| D | kernel_arch_data.h | 60 uintptr_t r5; member
81 uintptr_t r5;
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| D | swap_macros.h | 196 STR r5, sp, ___isf_t_r5_OFFSET
257 LDR r5, sp, ___isf_t_r5_OFFSET
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| /Zephyr-Core-3.5.0/include/zephyr/arch/arm/ |
| D | syscall.h | 49 register uint32_t r5 __asm__("r5") = arg6; in arch_syscall_invoke6()
56 "r" (r4), "r" (r5), "r" (r6) in arch_syscall_invoke6()
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| /Zephyr-Core-3.5.0/include/zephyr/arch/arc/v2/secureshield/ |
| D | arc_secure.h | 62 register uint32_t r5 __asm__("r5") = arg6; in _arc_s_call_invoke6()
72 "r" (r4), "r" (r5), "r" (r6)); in _arc_s_call_invoke6()
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| /Zephyr-Core-3.5.0/arch/nios2/core/offsets/ |
| D | offsets.c | 52 GEN_OFFSET_SYM(z_arch_esf_t, r5);
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| /Zephyr-Core-3.5.0/include/zephyr/arch/nios2/ |
| D | arch.h | 108 uint32_t r5; /* register args */ member
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| /Zephyr-Core-3.5.0/arch/arc/core/secureshield/ |
| D | arc_secure.S | 15 mov r5, 0
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| /Zephyr-Core-3.5.0/arch/arc/core/offsets/ |
| D | offsets.c | 54 GEN_OFFSET_SYM(_isf_t, r5);
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| /Zephyr-Core-3.5.0/cmake/ |
| D | gcc-m-cpu.cmake | 44 set(GCC_M_CPU cortex-r5)
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| /Zephyr-Core-3.5.0/boards/arm/swan_r5/ |
| D | swan_r5.dts | 15 compatible = "blues,swan-r5";
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| /Zephyr-Core-3.5.0/arch/arm/core/cortex_a_r/ |
| D | reset.S | 92 mov r5, #0
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