/Zephyr-Core-3.5.0/tests/modules/nanopb/src/ |
D | main.c | 50 msg.nested.id = 42; in ZTEST() 51 strcpy(msg.nested.name, "Test name"); in ZTEST() 66 zassert_equal(42, msg.nested.id); in ZTEST() 68 zassert_equal(0, strcmp(msg.nested.name, "Test name")); in ZTEST()
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/Zephyr-Core-3.5.0/tests/modules/nanopb/proto/ |
D | complex.proto | 9 import "sub/nested.proto"; 12 NestedMessage nested = 1; field
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/Zephyr-Core-3.5.0/arch/arm/include/cortex_a_r/ |
D | exc.h | 38 return (_kernel.cpus[0].nested != 0U); in arch_is_in_isr() 43 return (_kernel.cpus[0].nested > 1U) ? (true) : (false); in arch_is_in_nested_exception()
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/Zephyr-Core-3.5.0/arch/sparc/core/ |
D | irq_manage.c | 31 _current_cpu->nested++; in z_sparc_enter_irq() 48 _current_cpu->nested--; in z_sparc_enter_irq()
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/Zephyr-Core-3.5.0/arch/x86/include/ |
D | kernel_arch_func.h | 30 ret = arch_curr_cpu()->nested != 0; in arch_is_in_isr() 34 return _kernel.cpus[0].nested != 0U; in arch_is_in_isr()
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/Zephyr-Core-3.5.0/boards/posix/native_posix/ |
D | irq_handler.c | 79 if (_kernel.cpus[0].nested == 0) { in posix_irq_handler() 83 _kernel.cpus[0].nested++; in posix_irq_handler() 99 _kernel.cpus[0].nested--; in posix_irq_handler()
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/Zephyr-Core-3.5.0/boards/posix/native_sim/ |
D | irq_handler.c | 80 if (_kernel.cpus[0].nested == 0) { in posix_irq_handler() 84 _kernel.cpus[0].nested++; in posix_irq_handler() 100 _kernel.cpus[0].nested--; in posix_irq_handler()
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/Zephyr-Core-3.5.0/include/zephyr/arch/riscv/ |
D | irq.h | 67 ++(arch_curr_cpu()->nested); in arch_isr_direct_header() 85 --(arch_curr_cpu()->nested); in arch_isr_direct_footer()
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/Zephyr-Core-3.5.0/arch/arm64/include/ |
D | exc.h | 31 return arch_curr_cpu()->nested != 0U; in arch_is_in_isr()
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/Zephyr-Core-3.5.0/arch/nios2/core/ |
D | irq_manage.c | 83 _kernel.cpus[0].nested++; in _enter_irq() 107 _kernel.cpus[0].nested--; in _enter_irq()
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/Zephyr-Core-3.5.0/arch/mips/core/ |
D | irq_manage.c | 65 _current_cpu->nested++; in z_mips_enter_irq() 91 _current_cpu->nested--; in z_mips_enter_irq()
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/Zephyr-Core-3.5.0/boards/posix/nrf_bsim/ |
D | irq_handler.c | 98 if (_kernel.cpus[0].nested == 0) { in posix_irq_handler() 102 _kernel.cpus[0].nested++; in posix_irq_handler() 120 _kernel.cpus[0].nested--; in posix_irq_handler()
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/Zephyr-Core-3.5.0/arch/riscv/include/ |
D | kernel_arch_func.h | 79 bool ret = arch_curr_cpu()->nested != 0U; in arch_is_in_isr() 84 return _kernel.cpus[0].nested != 0U; in arch_is_in_isr()
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/Zephyr-Core-3.5.0/arch/posix/include/ |
D | kernel_arch_func.h | 38 return _kernel.cpus[0].nested != 0U; in arch_is_in_isr()
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/Zephyr-Core-3.5.0/arch/xtensa/include/ |
D | kernel_arch_func.h | 44 cpu0->nested = 0; in z_xtensa_kernel_init() 180 return arch_curr_cpu()->nested != 0U; in arch_is_in_isr()
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/Zephyr-Core-3.5.0/arch/mips/include/ |
D | kernel_arch_func.h | 42 return _current_cpu->nested != 0U; in arch_is_in_isr()
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/Zephyr-Core-3.5.0/include/zephyr/arch/x86/ia32/ |
D | arch.h | 282 ++_kernel.cpus[0].nested; in arch_isr_direct_header() 298 --_kernel.cpus[0].nested; in arch_isr_direct_footer() 306 if (swap != 0 && _kernel.cpus[0].nested == 0 && in arch_isr_direct_footer()
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/Zephyr-Core-3.5.0/arch/arm/core/cortex_a_r/ |
D | fault.c | 150 if (_kernel.cpus[0].nested > 1) { in z_arm_fault_undef_instruction_fp() 173 if (((_kernel.cpus[0].nested == 2) in z_arm_fault_undef_instruction_fp() 175 || ((_kernel.cpus[0].nested > 2) in z_arm_fault_undef_instruction_fp()
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/Zephyr-Core-3.5.0/arch/sparc/include/ |
D | kernel_arch_func.h | 50 return _current_cpu->nested != 0U; in arch_is_in_isr()
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/Zephyr-Core-3.5.0/arch/nios2/include/ |
D | kernel_arch_func.h | 46 return _kernel.cpus[0].nested != 0U; in arch_is_in_isr()
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/Zephyr-Core-3.5.0/tests/modules/nanopb/ |
D | CMakeLists.txt | 15 proto/sub/nested.proto
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/Zephyr-Core-3.5.0/arch/x86/core/ |
D | prep_c.c | 28 _kernel.cpus[0].nested = 0; in z_x86_prep_c()
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/Zephyr-Core-3.5.0/kernel/include/ |
D | kernel_offsets.h | 29 GEN_OFFSET_SYM(_cpu_t, nested);
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/Zephyr-Core-3.5.0/boards/arm/am62x_m4/doc/ |
D | index.rst | 29 | NVIC | on-chip | nested vector interrupt controller |
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/Zephyr-Core-3.5.0/boards/arm/bcm958402m2_m7/doc/ |
D | index.rst | 27 | NVIC | on-chip | nested vectored interrupt controller |
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