/Zephyr-Core-3.5.0/include/zephyr/arch/nios2/ |
D | asm_inline_gcc.h | 24 static ALWAYS_INLINE void sys_write32(uint32_t data, mm_reg_t addr) in sys_write32() 29 static ALWAYS_INLINE uint32_t sys_read32(mm_reg_t addr) in sys_read32() 34 static ALWAYS_INLINE void sys_write8(uint8_t data, mm_reg_t addr) in sys_write8() 39 static ALWAYS_INLINE uint8_t sys_read8(mm_reg_t addr) in sys_read8() 44 static ALWAYS_INLINE void sys_write16(uint16_t data, mm_reg_t addr) in sys_write16() 49 static ALWAYS_INLINE uint16_t sys_read16(mm_reg_t addr) in sys_read16()
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D | nios2.h | 166 (mm_reg_t)z_nios2_get_register_address(base, regnum)); in _nios2_reg_write() 171 return sys_read32((mm_reg_t)z_nios2_get_register_address(base, regnum)); in _nios2_reg_read()
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/Zephyr-Core-3.5.0/include/zephyr/sys/ |
D | device_mmio.h | 96 static inline void device_map(mm_reg_t *virt_addr, uintptr_t phys_addr, in device_map() 121 mm_reg_t addr; 126 .addr = (mm_reg_t)DT_REG_ADDR_U64(node_id) \ 131 .addr = (mm_reg_t)DT_REG_ADDR_BY_NAME_U64(node_id, name) \ 176 #define DEVICE_MMIO_RAM mm_reg_t _mmio 192 #define DEVICE_MMIO_RAM_PTR(device) (mm_reg_t *)((device)->data) 349 #define DEVICE_MMIO_NAMED_RAM(name) mm_reg_t name 587 mm_reg_t Z_TOPLEVEL_RAM_NAME(name); \ 614 extern mm_reg_t Z_TOPLEVEL_RAM_NAME(name); \ 638 static mm_reg_t Z_TOPLEVEL_RAM_NAME(name); \ [all …]
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D | sys_io.h | 20 typedef uintptr_t mm_reg_t; typedef
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/Zephyr-Core-3.5.0/drivers/clock_control/ |
D | clock_control_agilex5_ll.c | 17 mm_reg_t base_addr; 18 mm_reg_t mainpll_addr; 19 mm_reg_t peripll_addr; 20 mm_reg_t ctl_addr; 27 void clock_agilex5_ll_init(mm_reg_t base_addr) in clock_agilex5_ll_init()
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D | clock_control_agilex5_ll.h | 113 void clock_agilex5_ll_init(mm_reg_t base_addr);
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/Zephyr-Core-3.5.0/include/zephyr/arch/x86/ |
D | arch.h | 95 static ALWAYS_INLINE void sys_write8(uint8_t data, mm_reg_t addr) in sys_write8() 103 static ALWAYS_INLINE uint8_t sys_read8(mm_reg_t addr) in sys_read8() 115 static ALWAYS_INLINE void sys_write16(uint16_t data, mm_reg_t addr) in sys_write16() 123 static ALWAYS_INLINE uint16_t sys_read16(mm_reg_t addr) in sys_read16() 135 static ALWAYS_INLINE void sys_write32(uint32_t data, mm_reg_t addr) in sys_write32() 143 static ALWAYS_INLINE uint32_t sys_read32(mm_reg_t addr) in sys_read32()
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/Zephyr-Core-3.5.0/tests/kernel/device/src/ |
D | mmio.c | 65 mm_reg_t regs; in ZTEST() 162 mm_reg_t regs_corge, regs_grault; in ZTEST() 223 mm_reg_t regs_foo3, regs_foo4; in ZTEST() 265 mm_reg_t regs = 0; in ZTEST()
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/Zephyr-Core-3.5.0/drivers/misc/timeaware_gpio/ |
D | timeaware_gpio_intel.c | 62 static mm_reg_t regs(const struct device *dev) in regs() 87 mm_reg_t addr = regs(dev); in tgpio_intel_pin_disable() 105 mm_reg_t addr = regs(dev); in tgpio_intel_periodic_output() 145 mm_reg_t addr = regs(dev); in tgpio_intel_config_external_timestamp()
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/Zephyr-Core-3.5.0/include/zephyr/drivers/interrupt_controller/ |
D | loapic.h | 87 mm_reg_t base; in x86_read_xapic() 131 mm_reg_t base; in x86_write_xapic()
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/Zephyr-Core-3.5.0/drivers/pwm/ |
D | pwm_xlnx_axi_timer.c | 43 mm_reg_t base; 49 mm_reg_t offset) in xlnx_axi_timer_read32() 58 mm_reg_t offset) in xlnx_axi_timer_write32()
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/Zephyr-Core-3.5.0/include/zephyr/arch/x86/intel64/ |
D | arch.h | 25 static ALWAYS_INLINE void sys_write64(uint64_t data, mm_reg_t addr) in sys_write64() 34 static ALWAYS_INLINE uint64_t sys_read64(mm_reg_t addr) in sys_read64()
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/Zephyr-Core-3.5.0/drivers/can/ |
D | can_esp32_twai.c | 69 mm_reg_t base; 84 mm_reg_t addr = twai_config->base + reg * sizeof(uint32_t); in can_esp32_twai_read_reg() 93 mm_reg_t addr = twai_config->base + reg * sizeof(uint32_t); in can_esp32_twai_write_reg() 107 mm_reg_t addr = twai_config->base + reg * sizeof(uint32_t); in can_esp32_twai_write_reg32()
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/Zephyr-Core-3.5.0/arch/x86/core/ |
D | early_serial.c | 26 static mm_reg_t mmio; 34 static mm_reg_t mmio;
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/Zephyr-Core-3.5.0/drivers/pcie/host/ |
D | msi.c | 210 sys_write32(map, (mm_reg_t) &vectors[i].msix_vector->msg_addr); in enable_msix() 211 sys_write32(0, (mm_reg_t) &vectors[i].msix_vector->msg_up_addr); in enable_msix() 212 sys_write32(mdr, (mm_reg_t) &vectors[i].msix_vector->msg_data); in enable_msix() 213 sys_write32(0, (mm_reg_t) &vectors[i].msix_vector->vector_ctrl); in enable_msix()
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/Zephyr-Core-3.5.0/drivers/disk/nvme/ |
D | nvme_helpers.h | 504 sys_read32((mm_reg_t)b_a + nvme_mmio_offsetof(reg)) 507 sys_write32(val, (mm_reg_t)b_a + nvme_mmio_offsetof(reg)) 512 (mm_reg_t)b_a + nvme_mmio_offsetof(reg)); \ 514 (mm_reg_t)b_a + nvme_mmio_offsetof(reg) + 4); \
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D | nvme_controller.c | 27 mm_reg_t regs = DEVICE_MMIO_GET(dev); in nvme_controller_wait_for_ready() 59 mm_reg_t regs = DEVICE_MMIO_GET(dev); in nvme_controller_disable() 96 mm_reg_t regs = DEVICE_MMIO_GET(dev); in nvme_controller_enable() 140 mm_reg_t regs = DEVICE_MMIO_GET(dev); in nvme_controller_setup_admin_queues() 256 mm_reg_t regs = DEVICE_MMIO_GET(dev); in nvme_controller_gather_info()
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/Zephyr-Core-3.5.0/drivers/mm/ |
D | mm_drv_intel_adsp.h | 36 ((mm_reg_t)DEVICE_MMIO_TOPLEVEL_GET(tlb_regs))
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/Zephyr-Core-3.5.0/include/zephyr/drivers/pcie/ |
D | controller.h | 141 uint32_t pcie_generic_ctrl_conf_read(mm_reg_t cfg_addr, pcie_bdf_t bdf, unsigned int reg); 156 void pcie_generic_ctrl_conf_write(mm_reg_t cfg_addr, pcie_bdf_t bdf,
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/Zephyr-Core-3.5.0/drivers/gpio/ |
D | gpio_neorv32.c | 30 mm_reg_t input; 31 mm_reg_t output;
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/Zephyr-Core-3.5.0/subsys/shell/modules/ |
D | devmem_service.c | 43 mm_reg_t addr; in memory_dump() 48 device_map((mm_reg_t *)&addr, phys_addr, size, K_MEM_CACHE_NONE); in memory_dump() 323 device_map((mm_reg_t *)&addr, phys_addr, 0x100, K_MEM_CACHE_NONE); in cmd_devmem()
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/Zephyr-Core-3.5.0/drivers/pinctrl/ |
D | pinctrl_xlnx_zynq.c | 26 static mm_reg_t base = DT_INST_REG_ADDR(0);
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/Zephyr-Core-3.5.0/drivers/counter/ |
D | counter_xlnx_axi_timer.c | 47 mm_reg_t base; 59 mm_reg_t offset) in xlnx_axi_timer_read32() 68 mm_reg_t offset) in xlnx_axi_timer_write32()
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/Zephyr-Core-3.5.0/soc/arm/xilinx_zynq7000/xc7zxxxs/ |
D | soc.c | 110 mm_reg_t addr = DT_REG_ADDR(DT_NODELABEL(slcr)); in z_arm_platform_init()
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/Zephyr-Core-3.5.0/soc/arm/xilinx_zynq7000/xc7zxxx/ |
D | soc.c | 110 mm_reg_t addr = DT_REG_ADDR(DT_NODELABEL(slcr)); in z_arm_platform_init()
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