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/Zephyr-Core-3.5.0/tests/arch/common/timing/src/
Dmain.c29 timing_t start, middle, end; in perform_tests() local
38 middle = arch_timing_counter_get(); in perform_tests()
43 diff1 = arch_timing_cycles_get(&start, &middle); in perform_tests()
44 diff2 = arch_timing_cycles_get(&middle, &end); in perform_tests()
/Zephyr-Core-3.5.0/doc/connectivity/networking/conn_mgr/figures/
Dintegration_diagram_simplified.drawio10 …="text;html=1;strokeColor=none;fillColor=none;align=center;verticalAlign=middle;whiteSpace=wrap;ro…
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Dintegration_diagram_detailed.drawio13 …="text;html=1;strokeColor=none;fillColor=none;align=center;verticalAlign=middle;whiteSpace=wrap;ro…
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/Zephyr-Core-3.5.0/doc/safety/images/
Dzephyr-safety-process.svg1 …middle">Releases</text></switch></g><path d="M 78 542.67 L 78 389.33 C 78 368.16 122.77 351 178 35…
/Zephyr-Core-3.5.0/subsys/bluetooth/controller/ticker/
Dticker.c272 uint8_t middle; /* Slot index of last managed user op. member
1891 while (user->middle != user->last) {
1896 uint8_t middle;
1898 user_op = &user_ops[user->middle];
1901 prev = user->middle;
1902 middle = user->middle + 1;
1903 if (middle == user->count_user_op) {
1904 middle = 0U;
1906 user->middle = middle;
1974 user->middle = prev;
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/Zephyr-Core-3.5.0/scripts/build/
Dgen_syscalls.py189 middle = "struct { uintptr_t lo, hi; } split" if split else "uintptr_t x"
190 return "union { %s; %s val; }" % (middle, type)
/Zephyr-Core-3.5.0/samples/subsys/zbus/runtime_obs_registration/
DREADME.rst11 In this sample, we have the threads producer and consumer. In the middle of the communication, we h…
/Zephyr-Core-3.5.0/doc/services/pm/
Ddevice.rst67 a low power state only if no device is in the middle of a hardware
195 the middle of a hardware transaction, such as writing to a flash memory, may
197 transactions by indicating to the kernel that the device is in the middle of an
/Zephyr-Core-3.5.0/doc/connectivity/bluetooth/api/mesh/
Dblob_srv.rst69 <bt_mesh_blob_srv_cb.suspended>` callback. If the BLOB Transfer Server is in the middle of receiving
/Zephyr-Core-3.5.0/subsys/logging/
DKconfig.formatting172 This formatting is something in the middle between the pure raw format
/Zephyr-Core-3.5.0/doc/_static/js/
Ddark-mode-toggle.min.mjs2 …r(--${$}-icon-size,1rem);width:var(--${$}-icon-size,1rem);vertical-align:middle;}[part=lightLabel]…
/Zephyr-Core-3.5.0/doc/_doxygen/
Ddoxygen-awesome.css341 vertical-align: middle;
735 vertical-align: middle;
1493 vertical-align: middle;
/Zephyr-Core-3.5.0/doc/contribute/
Dcontributor_expectations.rst160 middle of a review. If a rebase is required, push this as a separate update
/Zephyr-Core-3.5.0/boards/xtensa/esp_wrover_kit/doc/
Dindex.rst211 The JP1 connector consists of 14x2 male pins whose functions are shown in the middle two “I/O”
/Zephyr-Core-3.5.0/doc/security/
Dsensor-threat.rst210 DNS results or attempt man-in-the-middle attacks
Dvulnerabilities.rst318 man in the middle attack. This is mitigated by firmware images
/Zephyr-Core-3.5.0/doc/_static/css/
Dcustom.css576 vertical-align: middle;
/Zephyr-Core-3.5.0/samples/modules/tflite-micro/hello_world/train/
Dtrain_hello_world_model.ipynb1718 …rlier, but with 16 neurons in the first layer and an additional layer of 16 neurons in the middle:"
3208 " vertical-align: middle;\n",
3312 " vertical-align: middle;\n",
/Zephyr-Core-3.5.0/doc/releases/
Drelease-notes-2.3.rst86 I2C master was reset in the middle of an I2C transaction or if a noise