Searched refs:mailbox (Results 1 – 25 of 67) sorted by relevance
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| /Zephyr-Core-3.5.0/dts/arm/st/h7/ |
| D | stm32h7_dualcore.dtsi | 19 mailbox: mailbox@58026400 { label
20 compatible = "st,stm32-hsem-mailbox";
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| D | stm32h747Xi_m7.dtsi | 24 mailbox@58026400 {
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| D | stm32h747Xi_m4.dtsi | 29 mailbox@58026400 {
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| D | stm32h745Xi_m7.dtsi | 30 mailbox@58026400 {
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| D | stm32h745Xi_m4.dtsi | 29 mailbox@58026400 {
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| /Zephyr-Core-3.5.0/dts/arm/xilinx/ |
| D | zynqmp_rpu.dtsi | 25 compatible = "xlnx,zynqmp-ipi-mailbox";
35 rpu0_apu_mailbox: mailbox@ff990200 {
47 rpu0_rpu1_mailbox: mailbox@ff990260 {
65 compatible = "xlnx,zynqmp-ipi-mailbox";
74 rpu1_apu_mailbox: mailbox@ff990400 {
86 rpu1_rpu0_mailbox: mailbox@ff990420 {
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| /Zephyr-Core-3.5.0/doc/kernel/services/data_passing/ |
| D | mailboxes.rst | 6 A :dfn:`mailbox` is a kernel object that provides enhanced message queue
8 A mailbox allows threads to send and receive messages of any size
19 mailbox is referenced by its memory address.
21 A mailbox has the following key properties:
27 A mailbox must be initialized before it can be used. This sets both of its
30 A mailbox allows threads, but not ISRs, to exchange messages.
36 Messages exchanged using a mailbox are handled non-anonymously,
44 data is located, and how the message is to be handled by the mailbox.
46 when accessing a mailbox. The mailbox uses the message descriptors to perform
48 The mailbox also updates certain message descriptor fields during the exchange,
[all …]
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| /Zephyr-Core-3.5.0/tests/benchmarks/app_kernel/src/ |
| D | mailbox_r.c | 17 void mailbox_get(struct k_mbox *mailbox,
72 void mailbox_get(struct k_mbox *mailbox, in mailbox_get() argument
89 return_value |= k_mbox_get(mailbox, in mailbox_get()
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| /Zephyr-Core-3.5.0/samples/boards/stm32/h7_dual_core/boards/ |
| D | stm32h747i_disco_m4.overlay | 1 &mailbox {
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| D | stm32h747i_disco_m7.overlay | 1 &mailbox {
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| /Zephyr-Core-3.5.0/soc/arm/st_stm32/stm32f0/ |
| D | Kconfig.defconfig.stm32f031x6 | 3 # Copyright (c) 2021 Sebastian Schwabe <sebastian.schwabe@mailbox.tu-dresden.de>
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| /Zephyr-Core-3.5.0/boards/arm/nucleo_f031k6/ |
| D | Kconfig.defconfig | 3 # Copyright (c) 2021 Sebastian Schwabe <sebastian.schwabe@mailbox.tu-dresden.de>
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| D | Kconfig.board | 3 # Copyright (c) 2021 Sebastian Schwabe <sebastian.schwabe@mailbox.tu-dresden.de>
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| /Zephyr-Core-3.5.0/samples/subsys/ipc/openamp_rsc_table/boards/ |
| D | stm32mp157c_dk2.overlay | 13 zephyr,ipc = &mailbox;
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| /Zephyr-Core-3.5.0/boards/arm/nucleo_f303k8/ |
| D | Kconfig.defconfig | 3 # Copyright (c) 2020 Sebastian Schwabe <sebastian.schwabe@mailbox.tu-dresden.de>
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| D | Kconfig.board | 3 # Copyright (c) 2020 Sebastian Schwabe <sebastian.schwabe@mailbox.tu-dresden.de>
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| /Zephyr-Core-3.5.0/dts/arm/st/f0/ |
| D | stm32f031X6.dtsi | 2 * Copyright (c) 2021 Sebastian Schwabe <sebastian.schwabe@mailbox.tu-dresden.de>
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| /Zephyr-Core-3.5.0/soc/arm/st_stm32/stm32f3/ |
| D | Kconfig.defconfig.stm32f303x8 | 3 # Copyright (c) 2020 Sebastian Schwabe <sebastian.schwabe@mailbox.tu-dresden.de>
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| /Zephyr-Core-3.5.0/samples/drivers/ipm/ipm_mcux/ |
| D | README.rst | 5 Implement inter-processor mailbox (IPM) on NXP LPC family.
11 sample application uses a mailbox to send messages from one
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| /Zephyr-Core-3.5.0/drivers/mbox/ |
| D | Kconfig.andes | 13 Enable driver for the Andes IPM mailbox controller.
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| /Zephyr-Core-3.5.0/samples/boards/stm32/h7_dual_core/ |
| D | README.rst | 8 Blinky led triggered by mailbox new message.
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| /Zephyr-Core-3.5.0/drivers/can/ |
| D | can_stm32_bxcan.c | 787 CAN_TxMailBox_TypeDef *mailbox = NULL; in can_stm32_send() local
834 mailbox = &can->sTxMailBox[0]; in can_stm32_send()
838 mailbox = &can->sTxMailBox[1]; in can_stm32_send()
842 mailbox = &can->sTxMailBox[2]; in can_stm32_send()
850 mailbox->TIR &= CAN_TI0R_TXRQ; in can_stm32_send()
853 mailbox->TIR |= (frame->id << CAN_TI0R_EXID_Pos) in can_stm32_send()
856 mailbox->TIR |= (frame->id << CAN_TI0R_STID_Pos); in can_stm32_send()
860 mailbox->TIR |= CAN_TI1R_RTR; in can_stm32_send()
862 mailbox->TDLR = frame->data_32[0]; in can_stm32_send()
863 mailbox->TDHR = frame->data_32[1]; in can_stm32_send()
[all …]
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| /Zephyr-Core-3.5.0/samples/boards/stm32/h7_dual_core/src/ |
| D | main.c | 37 const struct device *const ipm = DEVICE_DT_GET(DT_NODELABEL(mailbox)); in main()
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| /Zephyr-Core-3.5.0/dts/arm/nxp/ |
| D | nxp_lpc54xxx.dtsi | 17 mailbox-0 = &mailbox0;
142 mailbox0:mailbox@4008b000 {
143 compatible = "nxp,lpc-mailbox";
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| /Zephyr-Core-3.5.0/dts/arm/st/f3/ |
| D | stm32f303X8.dtsi | 2 * Copyright (c) 2020 Sebastian Schwabe <sebastian.schwabe@mailbox.tu-dresden.de>
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