| /Zephyr-Core-3.5.0/drivers/gpio/ |
| D | gpio_xlnx_ps.c | 72 uint32_t int_mask; in gpio_xlnx_ps_isr() local
76 int_mask = 0; in gpio_xlnx_ps_isr()
79 int_mask = api->get_pending_int(dev_conf->bank_devices[bank]); in gpio_xlnx_ps_isr()
81 if (int_mask) { in gpio_xlnx_ps_isr()
85 dev_conf->bank_devices[bank], int_mask); in gpio_xlnx_ps_isr()
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| D | gpio_pca95xx.c | 91 uint16_t int_mask; member
334 &drv_data->reg_cache.int_mask, value); in update_int_mask_reg()
684 reg_out = drv_data->reg_cache.int_mask; in gpio_pca95xx_pin_interrupt_configure()
861 .reg_cache.int_mask = 0xFFFF, \
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| /Zephyr-Core-3.5.0/drivers/sensor/adxl362/ |
| D | adxl362_trigger.c | 88 uint8_t int_mask, int_en, status_buf; in adxl362_trigger_set() local
100 int_mask = ADXL362_INTMAP1_ACT; in adxl362_trigger_set()
109 int_mask = ADXL362_INTMAP1_INACT; in adxl362_trigger_set()
118 int_mask = ADXL362_INTMAP1_DATA_READY; in adxl362_trigger_set()
127 int_en = int_mask; in adxl362_trigger_set()
132 return adxl362_reg_write_mask(dev, ADXL362_REG_INTMAP1, int_mask, int_en); in adxl362_trigger_set()
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| /Zephyr-Core-3.5.0/drivers/sensor/fdc2x1x/ |
| D | fdc2x1x_trigger.c | 87 uint16_t status, int_mask, int_en; in fdc2x1x_trigger_set() local
99 int_mask = FDC2X1X_ERROR_CONFIG_DRDY_2INT_MSK; in fdc2x1x_trigger_set()
108 int_en = int_mask; in fdc2x1x_trigger_set()
109 drv_data->int_config |= int_mask; in fdc2x1x_trigger_set()
115 FDC2X1X_ERROR_CONFIG, int_mask, int_en); in fdc2x1x_trigger_set()
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| /Zephyr-Core-3.5.0/drivers/sensor/adxl372/ |
| D | adxl372_trigger.c | 96 uint8_t int_mask, int_en, status1, status2; in adxl372_trigger_set() local
109 int_mask = ADXL372_INT1_MAP_ACT_MSK | in adxl372_trigger_set()
115 int_mask = ADXL372_INT1_MAP_DATA_RDY_MSK; in adxl372_trigger_set()
123 int_en = int_mask; in adxl372_trigger_set()
128 ret = drv_data->hw_tf->write_reg_mask(dev, ADXL372_INT1_MAP, int_mask, int_en); in adxl372_trigger_set()
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| /Zephyr-Core-3.5.0/drivers/i2c/ |
| D | i2c_xilinx_axi.c | 272 struct i2c_xilinx_axi_data *data, uint32_t int_mask) in i2c_xilinx_axi_wait_interrupt() argument
275 const uint32_t int_enable = sys_read32(config->base + REG_IER) | int_mask; in i2c_xilinx_axi_wait_interrupt()
280 k_event_clear(&data->irq_event, int_mask); in i2c_xilinx_axi_wait_interrupt()
283 events = k_event_wait(&data->irq_event, int_mask, false, K_MSEC(100)); in i2c_xilinx_axi_wait_interrupt()
287 LOG_ERR("Timeout waiting for ISR events 0x%02x, SR 0x%02x, ISR 0x%02x", int_mask, in i2c_xilinx_axi_wait_interrupt()
294 struct i2c_xilinx_axi_data *data, uint32_t int_mask) in i2c_xilinx_axi_clear_interrupt() argument
299 if (int_status & int_mask) { in i2c_xilinx_axi_clear_interrupt()
300 sys_write32(int_status & int_mask, config->base + REG_ISR); in i2c_xilinx_axi_clear_interrupt()
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| /Zephyr-Core-3.5.0/drivers/counter/ |
| D | counter_nrfx_timer.c | 230 uint32_t int_mask = nrf_timer_compare_int_get(ID_TO_CC(chan_id)); in cancel_alarm() local
232 nrf_timer_int_disable(config->timer, int_mask); in cancel_alarm()
340 uint32_t int_mask = nrf_timer_compare_int_get(cc); in alarm_irq_handle() local
343 nrf_timer_int_enable_check(reg, int_mask); in alarm_irq_handle()
352 nrf_timer_int_disable(reg, int_mask); in alarm_irq_handle()
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| D | counter_nrfx_rtc.c | 233 uint32_t int_mask = NRF_RTC_CHANNEL_INT_MASK(chan); in set_cc() local
239 __ASSERT(nrf_rtc_int_enable_check(rtc, int_mask) == 0, in set_cc()
255 nrf_rtc_event_enable(rtc, int_mask); in set_cc()
321 nrf_rtc_int_enable(rtc, int_mask); in set_cc()
619 uint32_t int_mask = NRF_RTC_CHANNEL_INT_MASK(chan); in alarm_irq_handle() local
621 nrf_rtc_int_enable_check(rtc, int_mask); in alarm_irq_handle()
630 nrf_rtc_int_disable(rtc, int_mask); in alarm_irq_handle()
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| /Zephyr-Core-3.5.0/drivers/virtualization/ |
| D | virt_ivshmem.h | 67 uint32_t int_mask; member
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| /Zephyr-Core-3.5.0/drivers/timer/ |
| D | nrf_rtc_timer.c | 64 static atomic_t int_mask; variable
157 atomic_val_t prev = atomic_and(&int_mask, ~BIT(chan)); in compare_int_lock()
178 atomic_or(&int_mask, BIT(chan)); in compare_int_unlock()
759 int_mask = BIT_MASK(CHAN_COUNT); in sys_clock_driver_init()
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| /Zephyr-Core-3.5.0/drivers/pwm/ |
| D | pwm_numaker.c | 359 uint32_t int_mask = (BIT(st_channel) | BIT(end_channel)); in pwm_numaker_isr() local
366 int_status = epwm->AINTSTS & int_mask; in pwm_numaker_isr()
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