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Searched refs:ienable (Results 1 – 3 of 3) sorted by relevance

/Zephyr-Core-3.5.0/arch/nios2/core/
Dirq_manage.c36 uint32_t ienable; in arch_irq_enable() local
41 ienable = z_nios2_creg_read(NIOS2_CR_IENABLE); in arch_irq_enable()
42 ienable |= BIT(irq); in arch_irq_enable()
43 z_nios2_creg_write(NIOS2_CR_IENABLE, ienable); in arch_irq_enable()
52 uint32_t ienable; in arch_irq_disable() local
57 ienable = z_nios2_creg_read(NIOS2_CR_IENABLE); in arch_irq_disable()
58 ienable &= ~BIT(irq); in arch_irq_disable()
59 z_nios2_creg_write(NIOS2_CR_IENABLE, ienable); in arch_irq_disable()
66 uint32_t ienable; in arch_irq_is_enabled() local
68 ienable = z_nios2_creg_read(NIOS2_CR_IENABLE); in arch_irq_is_enabled()
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/Zephyr-Core-3.5.0/drivers/dma/
Ddma_mchp_xec.c93 volatile uint32_t ienable; member
203 chregs->ienable = 0; in xec_dma_chan_clr()
437 chregs->ienable = BIT(XEC_DMA_CHAN_IES_BERR_POS) | BIT(XEC_DMA_CHAN_IES_DONE_POS); in dma_xec_configure()
472 chregs->ienable = 0; in dma_xec_reload()
512 chregs->ienable = 0u; in dma_xec_start()
522 chregs->ienable = BIT(XEC_DMA_CHAN_IES_BERR_POS) | BIT(XEC_DMA_CHAN_IES_DONE_POS); in dma_xec_start()
541 chregs->ienable = 0; in dma_xec_stop()
544 chregs->ienable = 0; in dma_xec_stop()
733 regs->ienable = 0u; in dma_xec_irq_handler()
/Zephyr-Core-3.5.0/include/zephyr/arch/nios2/
Dnios2.h182 #define NIOS2_IENABLE ienable