Searched refs:fpga (Results 1 – 25 of 31) sorted by relevance
12
| /Zephyr-Core-3.5.0/samples/drivers/fpga/fpga_controller/src/ |
| D | main.c | 16 const struct device *const fpga = DEVICE_DT_GET(DT_NODELABEL(fpga0)); variable
34 if (!device_is_ready(fpga)) { in main()
39 fpga_load(fpga, axFPGABitStream_red, in main()
42 fpga_reset(fpga); in main()
43 fpga_load(fpga, axFPGABitStream_green, in main()
46 fpga_reset(fpga); in main()
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| /Zephyr-Core-3.5.0/drivers/fpga/ |
| D | Kconfig | 13 module = fpga
14 module-str = fpga
29 source "drivers/fpga/Kconfig.eos_s3"
30 source "drivers/fpga/Kconfig.ice40"
31 source "drivers/fpga/Kconfig.zynqmp"
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| D | Kconfig.ice40 | 5 bool "Lattice iCE40 fpga driver [EXPERIMENTAL]"
10 Enable support for the Lattice iCE40 fpga driver.
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| D | Kconfig.zynqmp | 7 bool "ZYNQMP fpga driver"
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| D | Kconfig.eos_s3 | 7 bool "EOS S3 fpga driver"
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| D | fpga_shell.c | 142 SHELL_CMD_REGISTER(fpga, &sub_fpga, "FPGA commands", NULL);
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| /Zephyr-Core-3.5.0/samples/boards/qomu/src/ |
| D | main.c | 19 const struct device *fpga = device_get_binding("fpga"); in main() local
22 fpga_load(fpga, axFPGABitStream, axFPGABitStream_length); in main()
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| /Zephyr-Core-3.5.0/boards/arm/mercury_xu/ |
| D | mercury_xu.dts | 20 fpga0: fpga {
22 compatible = "xlnx,fpga";
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| /Zephyr-Core-3.5.0/samples/drivers/fpga/fpga_controller/ |
| D | README.rst | 1 .. zephyr:code-sample:: fpga-controller
26 :zephyr-app: samples/drivers/fpga/fpga_controller
36 :zephyr-app: samples/drivers/fpga/fpga_controller
68 The FPGA controller command can now be used (``fpga load <device> <address> <size in bytes>``):
72 uart:~$ fpga load FPGA 0x2001a46c 75960
81 uart:~$ fpga reset FPGA
114 uart:~$ fpga load FPGA 0x10000 75960
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| /Zephyr-Core-3.5.0/tests/drivers/build_all/fpga/ |
| D | spi.dtsi | 11 compatible = "lattice,ice40-fpga";
24 compatible = "lattice,ice40-fpga";
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| /Zephyr-Core-3.5.0/boards/riscv/m2gl025_miv/doc/ |
| D | index.rst | 12 `Microchip's website <https://www.microchip.com/en-us/products/fpgas-and-plds/fpga-and-soc-design-t…
35 <https://www.microchip.com/en-us/products/fpgas-and-plds/fpga-and-soc-design-tools/soc-fpga/softcon…
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| /Zephyr-Core-3.5.0/boards/riscv/mpfs_icicle/doc/ |
| D | index.rst | 9 …icicle board is a PolarFire SoC FPGA based development board with a Microchip MPFS250T fpga device.
35 <https://www.microchip.com/en-us/products/fpgas-and-plds/fpga-and-soc-design-tools/programming-and-…
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| /Zephyr-Core-3.5.0/boards/arm/arty/doc/ |
| D | index.rst | 213 https://www.arm.com/resources/designstart/designstart-fpga
216 https://developer.arm.com/ip-products/designstart/fpga
219 https://developer.arm.com/ip-products/designstart/fpga/fpga-xilinx
222 https://developer.arm.com/ip-products/designstart/fpga/fpga-xilinx-faqs
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| /Zephyr-Core-3.5.0/soc/nios2/nios2f-zephyr/cpu/ |
| D | README | 5 https://www.altera.com/products/boards_and_kits/dev-kits/altera/max-10-fpga-development-kit.html
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| /Zephyr-Core-3.5.0/boards/arm/quick_feather/ |
| D | quick_feather.dts | 57 fpga0: fpga {
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| /Zephyr-Core-3.5.0/boards/arm/qomu/ |
| D | qomu.dts | 57 fpga0: fpga {
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| /Zephyr-Core-3.5.0/drivers/ |
| D | CMakeLists.txt | 38 add_subdirectory_ifdef(CONFIG_FPGA fpga)
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| D | Kconfig | 32 source "drivers/fpga/Kconfig"
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| /Zephyr-Core-3.5.0/samples/modules/tflite-micro/tflm_ethosu/ |
| D | README.rst | 25 `MPS3 FPGA prototyping board <https://developer.arm.com/tools-and-software/development-boards/fpga-…
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| /Zephyr-Core-3.5.0/boards/arm/cyclonev_socdk/doc/ |
| D | index.rst | 245 …Info : JTAG tap: fpgasoc.fpga.tap tap/device found: 0x02d020dd (mfg: 0x06e (Altera), part: 0x2d02,…
284 …Info : JTAG tap: fpgasoc.fpga.tap tap/device found: 0x02d020dd (mfg: 0x06e (Altera), part: 0x2d02,…
310 …Info : JTAG tap: fpgasoc.fpga.tap tap/device found: 0x02d020dd (mfg: 0x06e (Altera), part: 0x2d02,…
355 …velopment Suite <https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/cy…
357 …load Center <https://www.intel.com/content/www/us/en/collections/products/fpga/software/downloads.…
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| /Zephyr-Core-3.5.0/boards/arm64/intel_socfpga_agilex5_socdk/doc/ |
| D | index.rst | 80 `Intel® Agilex™ 5 FPGA and SoC FPGA <https://www.intel.in/content/www/in/en/products/details/fpga/a…
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| /Zephyr-Core-3.5.0/boards/riscv/niosv_g/doc/ |
| D | index.rst | 24 - https://www.intel.com/content/www/us/en/design-example/776196/intel-arria-10-fpga-hello-world-des…
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| /Zephyr-Core-3.5.0/boards/nios2/qemu_nios2/doc/ |
| D | index.rst | 123 …w.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/ug/ug-max10m50-fpga-dev-kit.pdf>`_
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| /Zephyr-Core-3.5.0/samples/modules/tflite-micro/hello_world/ |
| D | README.rst | 51 [MPS3 FPGA prototyping board](https://developer.arm.com/tools-and-software/development-boards/fpga-…
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| /Zephyr-Core-3.5.0/boards/nios2/altera_max10/doc/ |
| D | index.rst | 327 …w.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/ug/ug-max10m50-fpga-dev-kit.pdf>`_
332 .. _Altera Lite Distribution: https://www.intel.com/content/www/us/en/collections/products/fpga/sof…
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