| /Zephyr-Core-3.5.0/soc/riscv/riscv-ite/it8xxx2/ |
| D | ilm.c | 80 const void *flash_addr, const size_t copy_sz) in it8xxx2_configure_ilm_block() argument
92 if (((uintptr_t)flash_addr - FLASH_BASE) & ~GENMASK(19, 0)) { in it8xxx2_configure_ilm_block()
95 if (!is_block_aligned(flash_addr)) { in it8xxx2_configure_ilm_block()
100 LOG_DBG("Enabling ILM%d %p -> %p, copy %d", dirmap_index, flash_addr, ram_addr, copy_sz); in it8xxx2_configure_ilm_block()
109 memcpy(ram_addr, flash_addr, copy_sz); in it8xxx2_configure_ilm_block()
111 scar->l = (uintptr_t)flash_addr & GENMASK(7, 0); in it8xxx2_configure_ilm_block()
112 scar->m = ((uintptr_t)flash_addr & GENMASK(15, 8)) >> 8; in it8xxx2_configure_ilm_block()
114 uint8_t scarh_value = ((uintptr_t)flash_addr & GENMASK(18, 16)) >> 16; in it8xxx2_configure_ilm_block()
116 if ((uintptr_t)flash_addr & BIT(19)) { in it8xxx2_configure_ilm_block()
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| /Zephyr-Core-3.5.0/drivers/flash/ |
| D | soc_flash_nrf.c | 320 .flash_addr = addr, in erase_synchronously()
341 .flash_addr = addr, in write_synchronously()
371 if (e_ctx->flash_addr == (off_t)NRF_UICR) { in erase_op()
388 if (e_ctx->flash_addr == e_ctx->flash_addr_next) { in erase_op()
389 nrfx_nvmc_page_partial_erase_init(e_ctx->flash_addr, in erase_op()
396 e_ctx->flash_addr += pg_size; in erase_op()
399 (void)nrfx_nvmc_page_erase(e_ctx->flash_addr); in erase_op()
401 e_ctx->flash_addr += pg_size; in erase_op()
424 w_ctx->flash_addr += shift; in shift_write_context()
442 if (!is_aligned_32(w_ctx->flash_addr)) { in write_op()
[all …]
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| D | soc_flash_xmc4xxx.c | 75 uint32_t flash_addr = dev_config->base; in flash_xmc4xxx_write() local
91 flash_addr |= 0xc000000; in flash_xmc4xxx_write()
92 flash_addr += offset; in flash_xmc4xxx_write()
106 XMC_FLASH_ProgramPage((uint32_t *)flash_addr, src_ptr); in flash_xmc4xxx_write()
108 flash_addr += dev_config->parameters.write_block_size; in flash_xmc4xxx_write()
135 uint32_t flash_addr = dev_config->base | 0xc000000; in flash_xmc4xxx_erase() local
138 flash_addr += offset; in flash_xmc4xxx_erase()
140 XMC_FLASH_EraseSector((uint32_t *)flash_addr); in flash_xmc4xxx_erase()
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| D | soc_flash_nrf.h | 18 uint32_t flash_addr; /* Address of flash to write or erase. */ member
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| D | flash_cadence_qspi_nor_ll.c | 344 int cad_qspi_indirect_read_start_bank(struct cad_qspi_params *cad_params, uint32_t flash_addr, in cad_qspi_indirect_read_start_bank() argument
352 sys_write32(flash_addr, cad_params->reg_base + CAD_QSPI_INDRDSTADDR); in cad_qspi_indirect_read_start_bank()
360 int cad_qspi_indirect_write_start_bank(struct cad_qspi_params *cad_params, uint32_t flash_addr, in cad_qspi_indirect_write_start_bank() argument
368 sys_write32(flash_addr, cad_params->reg_base + CAD_QSPI_INDWRSTADDR); in cad_qspi_indirect_write_start_bank()
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| /Zephyr-Core-3.5.0/scripts/west_commands/runners/ |
| D | pyocd.py | 21 dev_id=None, flash_addr=0x0, erase=False, flash_opts=None, argument
37 self.flash_addr_args = ['-a', hex(flash_addr)] if flash_addr else []
80 dev_id=True, flash_addr=True, erase=True,
121 flash_addr = cls.get_flash_address(args, build_conf)
126 flash_addr=flash_addr, erase=args.erase, flash_opts=args.flash_opt,
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| D | silabs_commander.py | 46 dev_id=True, flash_addr=True, erase=True,
95 flash_addr = self.flash_address_from_build_conf(self.build_conf)
97 flash_addr = 0
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| D | jlink.py | 77 dev_id=True, flash_addr=True, erase=True, reset=True,
302 flash_addr = self.flash_address_from_build_conf(self.build_conf)
304 flash_addr = 0
317 flash_addr = self.flash_address_from_build_conf(self.build_conf)
319 flash_addr = 0
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| D | spi_burn.py | 32 return RunnerCaps(commands={'flash', 'debug'}, erase=True, flash_addr=True)
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| D | dfu.py | 47 return RunnerCaps(commands={'flash'}, dev_id=True, flash_addr=True)
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| D | core.py | 250 flash_addr: bool = False variable in RunnerCaps
489 if caps.flash_addr:
558 if args.dt_flash and not caps.flash_addr:
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| D | linkserver.py | 65 dev_id=True, flash_addr=True, erase=True,
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| D | canopen_program.py | 87 return RunnerCaps(commands={'flash'}, dev_id=True, flash_addr=False)
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| D | intel_cyclonev.py | 103 dev_id=False, flash_addr=False, erase=False)
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| /Zephyr-Core-3.5.0/samples/drivers/espi/src/ |
| D | main.c | 577 saf_pkt.flash_addr = spi_addr; in saf_read()
597 saf_pkt.flash_addr += chunk_len; in saf_read()
632 saf_pkt.flash_addr = spi_addr; in saf_erase_block()
659 saf_pkt.flash_addr = spi_addr; in saf_page_prog()
678 saf_pkt.flash_addr += chunk_len; in saf_page_prog()
1093 uint32_t flash_addr = start_flash_adr; in read_test_block() local
1100 pckt.flash_addr = flash_addr; in read_test_block()
1110 flash_addr += MAX_FLASH_REQUEST; in read_test_block()
1120 uint32_t flash_addr = start_flash_adr; in write_test_block() local
1128 pckt.flash_addr = flash_addr; in write_test_block()
[all …]
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| /Zephyr-Core-3.5.0/scripts/west_commands/tests/ |
| D | test_pyocd.py | 213 def test_flash_args(require, cc, bc, pyocd_args, flash_addr, expected, pyocd): argument
215 return_value=flash_addr):
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| /Zephyr-Core-3.5.0/include/zephyr/drivers/ |
| D | espi_saf.h | 113 uint32_t flash_addr; member
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| D | espi.h | 368 uint32_t flash_addr; member
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| /Zephyr-Core-3.5.0/drivers/espi/ |
| D | espi_npcx.c | 889 int cyc_type, int flash_addr, int flash_len, int tx_payload) in espi_npcx_flash_prepare_tx_header() argument
914 inst->FLASHTXBUF[1] = sys_cpu_to_be32(flash_addr); in espi_npcx_flash_prepare_tx_header()
1010 pckt->flash_addr, in espi_npcx_flash_read()
1052 pckt->flash_addr, in espi_npcx_flash_write()
1104 pckt->flash_addr, in espi_npcx_flash_erase()
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| D | espi_it8xxx2.c | 1116 queue1_reg->UPSTREAM_DATA[0] = (pckt->flash_addr >> 24) & 0xff; in espi_it8xxx2_flash_trans()
1117 queue1_reg->UPSTREAM_DATA[1] = (pckt->flash_addr >> 16) & 0xff; in espi_it8xxx2_flash_trans()
1118 queue1_reg->UPSTREAM_DATA[2] = (pckt->flash_addr >> 8) & 0xff; in espi_it8xxx2_flash_trans()
1119 queue1_reg->UPSTREAM_DATA[3] = pckt->flash_addr & 0xff; in espi_it8xxx2_flash_trans()
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| D | espi_mchp_xec.c | 612 ESPI_FC_REGS->FL_ADDR_LSW = pckt->flash_addr; in espi_xec_flash_read()
668 ESPI_FC_REGS->FL_ADDR_LSW = pckt->flash_addr; in espi_xec_flash_write()
720 ESPI_FC_REGS->FL_ADDR_LSW = pckt->flash_addr; in espi_xec_flash_erase()
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| D | espi_mchp_xec_v2.c | 488 regs->FCFA[0] = pckt->flash_addr; in espi_xec_flash_read()
545 regs->FCFA[0] = pckt->flash_addr; in espi_xec_flash_write()
598 regs->FCFA[0] = pckt->flash_addr; in espi_xec_flash_erase()
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| D | espi_saf_mchp_xec.c | 729 regs->SAF_ECP_FLAR = pckt->flash_addr; in saf_ecp_access()
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| D | espi_saf_mchp_xec_v2.c | 930 regs->SAF_ECP_FLAR = pckt->flash_addr; in saf_ecp_access()
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| /Zephyr-Core-3.5.0/ |
| D | CMakeLists.txt | 1612 set(flash_addr "${CONFIG_FLASH_BASE_ADDRESS}") variable
1614 set(flash_addr "${CONFIG_FLASH_LOAD_OFFSET}") variable
1620 math(EXPR flash_addr
1621 "${flash_addr} + ${CONFIG_FLASH_LOAD_OFFSET} + 0"
1631 -b ${flash_addr}
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