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/Zephyr-Core-3.5.0/soc/riscv/riscv-privileged/telink_b91/
Dsoc.c60 #if ((DT_PROP(DT_PATH(cpus, cpu_0), clock_frequency) != CLK_16MHZ) && \
61 (DT_PROP(DT_PATH(cpus, cpu_0), clock_frequency) != CLK_24MHZ) && \
62 (DT_PROP(DT_PATH(cpus, cpu_0), clock_frequency) != CLK_32MHZ) && \
63 (DT_PROP(DT_PATH(cpus, cpu_0), clock_frequency) != CLK_48MHZ) && \
64 (DT_PROP(DT_PATH(cpus, cpu_0), clock_frequency) != CLK_64MHZ) && \
65 (DT_PROP(DT_PATH(cpus, cpu_0), clock_frequency) != CLK_96MHZ))
76 unsigned int cclk = DT_PROP(DT_PATH(cpus, cpu_0), clock_frequency); in soc_b91_init()
/Zephyr-Core-3.5.0/soc/riscv/riscv-privileged/sifive-freedom/
Dsoc.h40 DT_PROP_BY_PHANDLE_IDX(DT_NODELABEL(tlclk), clocks, 0, clock_frequency)
49 DT_PROP(DT_NODELABEL(pclk), clock_frequency)
Dfu740_clock.c13 BUILD_ASSERT(MHZ(1000) == DT_PROP(DT_NODELABEL(coreclk), clock_frequency),
15 BUILD_ASSERT(KHZ(125125) == DT_PROP(DT_NODELABEL(pclk), clock_frequency),
Dfu540_clock.c12 BUILD_ASSERT(MHZ(1000) == DT_PROP(DT_NODELABEL(coreclk), clock_frequency),
Dfe310_clock.c12 #define CORECLK_HZ (DT_PROP(DT_NODELABEL(coreclk), clock_frequency))
/Zephyr-Core-3.5.0/drivers/watchdog/
Dwdt_mcux_wdog32.c25 #if DT_NODE_HAS_PROP(DT_INST_PHANDLE(0, clocks), clock_frequency)
26 uint32_t clock_frequency; member
94 #if DT_NODE_HAS_PROP(DT_INST_PHANDLE(0, clocks), clock_frequency) in mcux_wdog32_install_timeout()
95 clock_freq = config->clock_frequency; in mcux_wdog32_install_timeout()
195 #if DT_NODE_HAS_PROP(DT_INST_PHANDLE(0, clocks), clock_frequency)
196 .clock_frequency = DT_INST_PROP_BY_PHANDLE(0, clocks, clock_frequency),
Dwdt_dw.c140 !(DT_INST_NODE_HAS_PROP(inst, clock_frequency) || DT_INST_NODE_HAS_PROP(inst, clocks)) ||
159 COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, clock_frequency), \
160 (.clk_freq = DT_INST_PROP(inst, clock_frequency)), \
161 (.clk_freq = DT_INST_PROP_BY_PHANDLE(inst, clocks, clock_frequency)) \
Dwdt_intel_adsp.c221 #if !(DT_NODE_HAS_PROP(DEV_NODE, clock_frequency) || DT_NODE_HAS_PROP(DEV_NODE, clocks))
227 COND_CODE_1(DT_NODE_HAS_PROP(DEV_NODE, clock_frequency),
228 (.clk_freq = DT_PROP(DEV_NODE, clock_frequency)),
229 (.clk_freq = DT_PROP_BY_PHANDLE(DEV_NODE, clocks, clock_frequency))
/Zephyr-Core-3.5.0/soc/xtensa/intel_adsp/common/
Dclk.c120 [ADSP_CLOCK_SOURCE_XTAL_OSC] = { DT_PROP(DT_NODELABEL(sysclk), clock_frequency) },
128 [ADSP_CLOCK_SOURCE_AUDIO_CARDINAL] = { DT_PROP(DT_NODELABEL(audioclk), clock_frequency) },
131 [ADSP_CLOCK_SOURCE_AUDIO_PLL_FIXED] = { DT_PROP(DT_NODELABEL(pllclk), clock_frequency) },
135 [ADSP_CLOCK_SOURCE_WOV_RING_OSC] = { DT_PROP(DT_NODELABEL(sysclk), clock_frequency) },
/Zephyr-Core-3.5.0/soc/arm/nxp_imx/rt/
Dsoc_rt10xx.c131 clock_frequency)); in clock_init()
133 clock_frequency)); in clock_init()
203 clock_frequency)) - 1); in clock_init()
226 DT_PROP_BY_PHANDLE(DT_NODELABEL(usb1), clocks, clock_frequency)); in clock_init()
228 DT_PROP_BY_PHANDLE(DT_NODELABEL(usb1), clocks, clock_frequency)); in clock_init()
234 DT_PROP_BY_PHANDLE(DT_NODELABEL(usb2), clocks, clock_frequency)); in clock_init()
236 DT_PROP_BY_PHANDLE(DT_NODELABEL(usb2), clocks, clock_frequency)); in clock_init()
Dsoc_rt11xx.c468 clock_frequency)) + 1); in clock_init()
480 DT_PROP_BY_PHANDLE(DT_NODELABEL(usb1), clocks, clock_frequency)); in clock_init()
482 DT_PROP_BY_PHANDLE(DT_NODELABEL(usb1), clocks, clock_frequency)); in clock_init()
488 DT_PROP_BY_PHANDLE(DT_NODELABEL(usb2), clocks, clock_frequency)); in clock_init()
490 DT_PROP_BY_PHANDLE(DT_NODELABEL(usb2), clocks, clock_frequency)); in clock_init()
/Zephyr-Core-3.5.0/drivers/pwm/
Dpwm_b91.c16 uint32_t clock_frequency; member
31 pwm_clk_div = sys_clk.pclk * 1000 * 1000 / config->clock_frequency - 1; in pwm_b91_init()
124 .clock_frequency = DT_INST_PROP(n, clock_frequency), \
/Zephyr-Core-3.5.0/drivers/spi/
Dspi_dw.c269 write_baudr(info, SPI_DW_CLK_DIVIDER(info->clock_frequency, in spi_dw_configure()
289 SPI_DW_CLK_DIVIDER(info->clock_frequency, in spi_dw_configure()
571 #if DT_NODE_HAS_PROP(DT_INST_PHANDLE(0, clocks), clock_frequency)
573 DT_INST_PROP_BY_PHANDLE(0, clocks, clock_frequency)
576 DT_INST_PROP(0, clock_frequency)
584 .clock_frequency = INST_0_SNPS_DESIGNWARE_SPI_CLOCK_FREQ,
655 #if DT_NODE_HAS_PROP(DT_INST_PHANDLE(1, clocks), clock_frequency)
657 DT_INST_PROP_BY_PHANDLE(1, clocks, clock_frequency)
660 DT_INST_PROP(1, clock_frequency)
668 .clock_frequency = INST_1_SNPS_DESIGNWARE_SPI_CLOCK_FREQ,
[all …]
Dspi_nxp_s32.c93 static void spi_nxp_s32_getbestfreq(uint32_t clock_frequency, in spi_nxp_s32_getbestfreq() argument
120 curr_freq = clock_frequency * 1U / in spi_nxp_s32_getbestfreq()
155 curr_freq = clock_frequency * 1U / in spi_nxp_s32_getbestfreq()
182 static void spi_nxp_s32_getbestdelay(uint32_t clock_frequency, uint32_t requested_delay, in spi_nxp_s32_getbestdelay() argument
194 clock_frequency = clock_frequency / MHZ(1); in spi_nxp_s32_getbestdelay()
204 * (1U << (scaler + 1)) / clock_frequency; in spi_nxp_s32_getbestdelay()
239 * (1U << (scaler + 1)) / clock_frequency; in spi_nxp_s32_getbestdelay()
/Zephyr-Core-3.5.0/include/zephyr/drivers/clock_control/
Dstm32_clock_control.h282 #define STM32_LSE_FREQ DT_PROP(DT_NODELABEL(clk_lse), clock_frequency)
287 #define STM32_LSE_FREQ DT_PROP(DT_NODELABEL(clk_lse), clock_frequency)
330 #define STM32_CSI_FREQ DT_PROP(DT_NODELABEL(clk_csi), clock_frequency)
337 #define STM32_LSI_FREQ DT_PROP(DT_NODELABEL(clk_lsi), clock_frequency)
340 #define STM32_LSI_FREQ DT_PROP(DT_NODELABEL(clk_lsi1), clock_frequency)
343 #define STM32_LSI_FREQ DT_PROP(DT_NODELABEL(clk_lsi2), clock_frequency)
351 #define STM32_HSI_FREQ DT_PROP(DT_NODELABEL(clk_hsi), clock_frequency)
358 #define STM32_HSI_FREQ DT_PROP(DT_NODELABEL(clk_hsi), clock_frequency)
367 #define STM32_HSE_FREQ DT_PROP(DT_NODELABEL(clk_hse), clock_frequency)
371 #define STM32_HSE_FREQ DT_PROP(DT_NODELABEL(clk_hse), clock_frequency)
[all …]
/Zephyr-Core-3.5.0/soc/arm/nxp_kinetis/ke1xf/
Dsoc.c71 .freq = DT_PROP(SCG_CLOCK_NODE(sosc_clk), clock_frequency),
89 #if MHZ(2) == DT_PROP(SCG_CLOCK_NODE(sirc_clk), clock_frequency)
91 #elif MHZ(8) == DT_PROP(SCG_CLOCK_NODE(sirc_clk), clock_frequency)
107 #if MHZ(48) == DT_PROP(SCG_CLOCK_NODE(firc_clk), clock_frequency)
109 #elif MHZ(52) == DT_PROP(SCG_CLOCK_NODE(firc_clk), clock_frequency)
111 #elif MHZ(56) == DT_PROP(SCG_CLOCK_NODE(firc_clk), clock_frequency)
113 #elif MHZ(60) == DT_PROP(SCG_CLOCK_NODE(firc_clk), clock_frequency)
/Zephyr-Core-3.5.0/soc/arm/atmel_sam/common/
Datmel_sam_dt.h19 DT_PROP(DT_PATH(cpus, cpu_0), clock_frequency)
/Zephyr-Core-3.5.0/soc/arc/snps_arc_iot/
Dsoc.c16 #define CPU_FREQ DT_PROP(DT_PATH(cpus, cpu_0), clock_frequency)
/Zephyr-Core-3.5.0/drivers/clock_control/
Dclock_control_smartbond.c29 .rcx_freq = DT_PROP(DT_NODELABEL(rcx), clock_frequency),
30 .rc32k_freq = DT_PROP(DT_NODELABEL(rc32k), clock_frequency),
246 *rate = DT_PROP(DT_NODELABEL(xtal32k), clock_frequency); in smartbond_clock_get_rate()
249 *rate = DT_PROP(DT_NODELABEL(rc32m), clock_frequency); in smartbond_clock_get_rate()
252 *rate = DT_PROP(DT_NODELABEL(xtal32m), clock_frequency); in smartbond_clock_get_rate()
255 *rate = DT_PROP(DT_NODELABEL(pll), clock_frequency); in smartbond_clock_get_rate()
Dclock_control_fixed_rate.c68 .rate = DT_INST_PROP(idx, clock_frequency), \
/Zephyr-Core-3.5.0/soc/arm/atmel_sam0/common/
Datmel_sam0_dt.h49 DT_PROP(DT_PATH(cpus, cpu_0), clock_frequency)
/Zephyr-Core-3.5.0/tests/drivers/clock_control/fixed_clock/src/
Dtest_clock_control.c10 #define TEST_FIXED_RATE_CLK0_RATE DT_PROP(TEST_FIXED_RATE_CLK0, clock_frequency)
/Zephyr-Core-3.5.0/soc/arm/nxp_kinetis/kl2x/
Dsoc.c78 DT_PROP(DT_PATH(cpus, cpu_0), clock_frequency)); in clock_init()
/Zephyr-Core-3.5.0/drivers/serial/
Duart_cmsdk_apb.c486 .sys_clk_freq = DT_INST_PROP_BY_PHANDLE(0, clocks, clock_frequency),
551 .sys_clk_freq = DT_INST_PROP_BY_PHANDLE(1, clocks, clock_frequency),
616 .sys_clk_freq = DT_INST_PROP_BY_PHANDLE(2, clocks, clock_frequency),
681 .sys_clk_freq = DT_INST_PROP_BY_PHANDLE(3, clocks, clock_frequency),
746 .sys_clk_freq = DT_INST_PROP_BY_PHANDLE(4, clocks, clock_frequency),
/Zephyr-Core-3.5.0/soc/arm/nxp_lpc/lpc54xxx/
Dsoc.c47 #define CPU_FREQ DT_PROP(DT_PATH(cpus, cpu_0), clock_frequency)

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