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Searched refs:clock_control_get_status (Results 1 – 11 of 11) sorted by relevance

/Zephyr-Core-3.5.0/tests/drivers/clock_control/clock_control_api/src/
Dtest_clock_control.c83 } while (clock_control_get_status(dev, subsys) != in setup_instance()
101 if (clock_control_get_status(clk, CLOCK_CONTROL_NRF_SUBSYS_LF) != in tear_down_instance()
160 status = clock_control_get_status(dev, subsys); in test_on_off_status_instance()
167 status = clock_control_get_status(dev, subsys); in test_on_off_status_instance()
174 status = clock_control_get_status(dev, subsys); in test_on_off_status_instance()
202 while (clock_control_get_status(dev, subsys) != in async_capable()
236 status = clock_control_get_status(dev, subsys); in test_async_on_instance()
248 clock_control_get_status(dev, subsys), in test_async_on_instance()
271 status = clock_control_get_status(dev, subsys); in test_async_on_stopped_on_instance()
306 status = clock_control_get_status(dev, subsys); in test_double_start_on_instance()
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/Zephyr-Core-3.5.0/tests/drivers/clock_control/fixed_clock/src/
Dtest_clock_control.c25 status = clock_control_get_status(dev, 0); in ZTEST()
32 status = clock_control_get_status(dev, 0); in ZTEST()
40 status = clock_control_get_status(dev, 0); in ZTEST()
/Zephyr-Core-3.5.0/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/src/
Dtest_stm32_clock_configuration_adc.c59 status = clock_control_get_status(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
71 status = clock_control_get_status(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
102 status = clock_control_get_status(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
Dtest_stm32_clock_configuration_i2c.c56 status = clock_control_get_status(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in i2c_set_clock()
82 status = clock_control_get_status(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
94 status = clock_control_get_status(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE), in ZTEST()
/Zephyr-Core-3.5.0/tests/drivers/clock_control/onoff/src/
Dtest_clock_control_onoff.c24 return clock_control_get_status(clk, CLOCK_CONTROL_NRF_SUBSYS_HF) == in clock_is_off()
/Zephyr-Core-3.5.0/samples/boards/nrf/clock_skew/src/
Dmain.c103 clkstat = clock_control_get_status(clock0, CLOCK_CONTROL_NRF_SUBSYS_LF); in show_clocks()
108 clkstat = clock_control_get_status(clock0, CLOCK_CONTROL_NRF_SUBSYS_HF); in show_clocks()
/Zephyr-Core-3.5.0/tests/drivers/clock_control/nrf_clock_calibration/src/
Dtest_nrf_clock_calibration.c49 while (clock_control_get_status(dev, subsys) != in turn_off_clock()
/Zephyr-Core-3.5.0/include/zephyr/drivers/
Dclock_control.h191 static inline enum clock_control_status clock_control_get_status(const struct device *dev, in clock_control_get_status() function
/Zephyr-Core-3.5.0/tests/drivers/clock_control/nrf_onoff_and_bt/src/
Dmain.c79 clock_control_get_status(dev, CLOCK_CONTROL_NRF_SUBSYS_HF); in check_hf_status()
/Zephyr-Core-3.5.0/samples/drivers/clock_control_litex/src/
Dmain.c74 clock_control_get_status(dev, sub_system); in litex_clk_test_getters()
/Zephyr-Core-3.5.0/samples/drivers/clock_control_litex/
DREADME.rst67 …equency, duty and phase offset) can be acquired with function ``clock_control_get_status()`` and c…