Searched refs:clk_div (Results 1 – 11 of 11) sorted by relevance
| /Zephyr-Core-3.5.0/drivers/clock_control/ |
| D | clock_control_ast10x0.c | 99 uint32_t reg, src, clk_div; in aspeed_clock_control_get_rate() local
112 clk_div = I3C_CLK_DIV_REG_TO_VAL(FIELD_GET(I3C_CLK_DIV_SEL, reg)); in aspeed_clock_control_get_rate()
113 *rate = src / clk_div; in aspeed_clock_control_get_rate()
118 clk_div = HCLK_DIV_REG_TO_VAL(FIELD_GET(HCLK_DIV_SEL, reg)); in aspeed_clock_control_get_rate()
119 *rate = src / clk_div; in aspeed_clock_control_get_rate()
124 clk_div = PCLK_DIV_REG_TO_VAL(FIELD_GET(PCLK_DIV_SEL, reg)); in aspeed_clock_control_get_rate()
125 *rate = src / clk_div; in aspeed_clock_control_get_rate()
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| D | clock_control_numaker_scc.c | 88 scc_subsys->pcc.clk_div); in numaker_scc_configure()
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| /Zephyr-Core-3.5.0/include/zephyr/drivers/clock_control/ |
| D | clock_control_numaker.h | 36 uint32_t clk_div; member
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| /Zephyr-Core-3.5.0/drivers/spi/ |
| D | spi_numaker.c | 31 uint32_t clk_div; member
290 scc_subsys.pcc.clk_div = dev_cfg->clk_div; in spi_numaker_init()
343 .clk_div = DT_INST_CLOCKS_CELL(inst, clock_divider), \
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| /Zephyr-Core-3.5.0/drivers/serial/ |
| D | uart_numaker.c | 26 uint32_t clk_div; member
201 scc_subsys.pcc.clk_div = config->clk_div; in uart_numaker_init()
434 .clk_div = DT_INST_CLOCKS_CELL(inst, clock_divider), \
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| D | uart_b91.c | 46 uint16_t clk_div; member
206 uart->clk_div = divider; in uart_b91_init()
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| /Zephyr-Core-3.5.0/drivers/sensor/esp32_temp/ |
| D | esp32_temp.c | 81 data->temp_sensor.dac_offset, data->temp_sensor.clk_div); in esp32_temp_init()
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| /Zephyr-Core-3.5.0/drivers/pwm/ |
| D | pwm_numaker.c | 38 uint32_t clk_div; member
483 scc_subsys.pcc.clk_div = cfg->clk_div; in pwm_numaker_init()
567 .clk_div = DT_INST_CLOCKS_CELL(inst, clock_divider), \
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| /Zephyr-Core-3.5.0/drivers/i2s/ |
| D | i2s_sam_ssc.c | 516 uint32_t clk_div = SOC_ATMEL_SAM_MCK_FREQ_HZ / bit_clk_freq / 2U; in bit_clock_set() local
518 if (clk_div == 0U || clk_div >= (1 << 12)) { in bit_clock_set()
523 ssc->SSC_CMR = clk_div; in bit_clock_set()
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| /Zephyr-Core-3.5.0/drivers/disk/ |
| D | sdmmc_stm32.c | 692 #if DT_INST_NODE_HAS_PROP(0, clk_div)
693 .Init.ClockDiv = DT_INST_PROP(0, clk_div),
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| /Zephyr-Core-3.5.0/drivers/i2c/ |
| D | i2c_ite_enhance.c | 295 uint32_t clk_div, psr, pll_clock; in i2c_enhanced_port_set_frequency() local
310 clk_div = (IT8XXX2_ECPM_SCDCR2 & 0x0F) + 1U; in i2c_enhanced_port_set_frequency()
312 psr = (pll_clock / (clk_div * (2U * freq_hz))) - 2U; in i2c_enhanced_port_set_frequency()
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