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/Zephyr-Core-3.5.0/soc/arm/nordic_nrf/nrf53/
Dsync_rtc.c74 static void ppi_ipc_to_rtc(union rtc_sync_channels channels, bool setup) in ppi_ipc_to_rtc() argument
76 nrf_ipc_event_t ipc_evt = nrf_ipc_receive_event_get(channels.ch.ipc_in); in ppi_ipc_to_rtc()
77 uint32_t task_addr = z_nrf_rtc_timer_capture_task_address_get(channels.ch.rtc); in ppi_ipc_to_rtc()
80 nrfx_gppi_task_endpoint_setup(channels.ch.ppi, task_addr); in ppi_ipc_to_rtc()
81 nrf_ipc_publish_set(NRF_IPC, ipc_evt, channels.ch.ppi); in ppi_ipc_to_rtc()
83 nrfx_gppi_task_endpoint_clear(channels.ch.ppi, task_addr); in ppi_ipc_to_rtc()
93 static void ppi_rtc_to_ipc(union rtc_sync_channels channels, bool setup) in ppi_rtc_to_ipc() argument
95 uint32_t evt_addr = z_nrf_rtc_timer_compare_evt_address_get(channels.ch.rtc); in ppi_rtc_to_ipc()
96 nrf_ipc_task_t ipc_task = nrf_ipc_send_task_get(channels.ch.ipc_out); in ppi_rtc_to_ipc()
99 nrf_ipc_subscribe_set(NRF_IPC, ipc_task, channels.ch.ppi); in ppi_rtc_to_ipc()
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/Zephyr-Core-3.5.0/subsys/task_wdt/
Dtask_wdt.c41 static struct task_wdt_channel channels[CONFIG_TASK_WDT_CHANNELS]; variable
69 for (int id = 0; id < ARRAY_SIZE(channels); id++) { in schedule_next_timeout()
70 if (channels[id].reload_period != 0 && in schedule_next_timeout()
71 channels[id].timeout_abs_ticks < next_timeout) { in schedule_next_timeout()
73 next_timeout = channels[id].timeout_abs_ticks; in schedule_next_timeout()
113 if (bg_channel || channels[channel_id].reload_period == 0) { in task_wdt_trigger()
118 if (channels[channel_id].callback) { in task_wdt_trigger()
119 channels[channel_id].callback(channel_id, in task_wdt_trigger()
120 channels[channel_id].user_data); in task_wdt_trigger()
170 for (int id = 0; id < ARRAY_SIZE(channels); id++) { in task_wdt_add()
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/Zephyr-Core-3.5.0/drivers/dma/
Ddma_rpi_pico.c27 uint32_t channels; member
46 struct dma_rpi_pico_channel *channels; member
115 if (channel >= cfg->channels) { in dma_rpi_pico_config()
116 LOG_ERR("channel must be < %" PRIu32 " (%" PRIu32 ")", cfg->channels, channel); in dma_rpi_pico_config()
175 data->channels[channel].config = dma_channel_get_default_config(channel); in dma_rpi_pico_config()
177 data->channels[channel].source_address = (void *)dma_cfg->head_block->source_address; in dma_rpi_pico_config()
178 data->channels[channel].dest_address = (void *)dma_cfg->head_block->dest_address; in dma_rpi_pico_config()
179 data->channels[channel].block_size = dma_cfg->head_block->block_size; in dma_rpi_pico_config()
180 channel_config_set_read_increment(&data->channels[channel].config, in dma_rpi_pico_config()
183 channel_config_set_write_increment(&data->channels[channel].config, in dma_rpi_pico_config()
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Ddma_gd32.c63 uint32_t channels; member
81 struct dma_gd32_channel *channels; member
349 if (channel >= cfg->channels) { in dma_gd32_config()
351 cfg->channels, channel); in dma_gd32_config()
482 data->channels[channel].callback = dma_cfg->dma_callback; in dma_gd32_config()
483 data->channels[channel].user_data = dma_cfg->user_data; in dma_gd32_config()
484 data->channels[channel].direction = dma_cfg->channel_direction; in dma_gd32_config()
495 if (ch >= cfg->channels) { in dma_gd32_reload()
497 cfg->channels, ch); in dma_gd32_reload()
501 if (data->channels[ch].busy) { in dma_gd32_reload()
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/Zephyr-Core-3.5.0/drivers/adc/
Dadc_mcp320x.c29 uint8_t channels; member
37 uint8_t channels; member
69 if (channel_cfg->channel_id >= config->channels) { in mcp320x_channel_setup()
84 uint8_t channels = 0; in mcp320x_validate_buffer_size() local
88 for (mask = BIT(config->channels - 1); mask != 0; mask >>= 1) { in mcp320x_validate_buffer_size()
89 if (mask & sequence->channels) { in mcp320x_validate_buffer_size()
90 channels++; in mcp320x_validate_buffer_size()
94 needed = channels * sizeof(uint16_t); in mcp320x_validate_buffer_size()
118 if (find_msb_set(sequence->channels) > config->channels) { in mcp320x_start_read()
120 sequence->channels); in mcp320x_start_read()
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Dadc_ads7052.c25 uint8_t channels; member
33 uint8_t channels; member
60 if (channel_cfg->channel_id >= config->channels) { in adc_ads7052_channel_setup()
70 uint8_t channels = 0; in ads7052_validate_buffer_size() local
73 channels = POPCOUNT(sequence->channels); in ads7052_validate_buffer_size()
75 needed = channels * sizeof(uint16_t); in ads7052_validate_buffer_size()
121 if (find_msb_set(sequence->channels) > config->channels) { in ads7052_start_read()
122 LOG_ERR("unsupported channels in mask: 0x%08x", sequence->channels); in ads7052_start_read()
164 data->channels = ctx->sequence.channels; in adc_context_start_sampling()
236 while (data->channels != 0) { in ads7052_acquisition_thread()
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Dadc_rpi_pico.c53 uint32_t channels; member
128 uint8_t channels = 0; in adc_rpi_check_buffer_size() local
133 if (mask & sequence->channels) { in adc_rpi_check_buffer_size()
134 channels++; in adc_rpi_check_buffer_size()
138 needed = channels * sizeof(uint16_t); in adc_rpi_check_buffer_size()
176 if (find_msb_set(sequence->channels) > config->num_channels) { in adc_rpi_start_read()
178 sequence->channels); in adc_rpi_start_read()
220 data->channels &= ~(BIT(ainsel)); in adc_rpi_isr()
223 if (data->channels == 0) { in adc_rpi_isr()
229 ainsel = (uint8_t)(find_lsb_set(data->channels) - 1); in adc_rpi_isr()
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Dadc_ifx_cat1.c43 uint32_t channels; member
55 uint32_t channels = data->channels; in _cyhal_adc_event_callback() local
59 while (channels != 0) { in _cyhal_adc_event_callback()
60 channel_id = find_lsb_set(channels) - 1; in _cyhal_adc_event_callback()
61 channels &= ~BIT(channel_id); in _cyhal_adc_event_callback()
162 if (sequence->channels & BIT(i)) { in validate_buffer_size()
184 uint32_t channels = sequence->channels; in start_read() local
185 uint32_t unconfigured_channels = channels & ~data->channels_mask; in start_read()
209 data->channels = channels; in start_read()
Dadc_sam_afec.c58 uint32_t channels; member
129 data->channel_id = find_lsb_set(data->channels) - 1; in adc_sam_start_conversion()
157 data->channels = ctx->sequence.channels; in adc_context_start_sampling()
193 uint32_t channels = sequence->channels; in start_read() local
195 data->channels = 0U; in start_read()
200 if (channels == 0U || in start_read()
201 (channels & (~0UL << NUM_CHANNELS))) { in start_read()
223 while (channels > 0) { in start_read()
224 if (channels & 1) { in start_read()
227 channels >>= 1; in start_read()
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Dadc_gecko.c34 uint32_t channels; member
96 uint32_t channels; in start_read() local
102 if (sequence->channels == 0) { in start_read()
113 channels = sequence->channels; in start_read()
115 while (channels) { in start_read()
117 index = find_lsb_set(channels) - 1; in start_read()
128 channels &= ~BIT(index); in start_read()
151 data->channel_id = find_lsb_set(data->channels) - 1; in adc_gecko_start_channel()
162 data->channels = ctx->sequence.channels; in adc_context_start_sampling()
194 data->channels &= ~BIT(data->channel_id); in adc_gecko_isr()
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Diadc_gecko.c38 uint32_t channels; member
111 uint32_t channels; in start_read() local
117 if (sequence->channels == 0) { in start_read()
134 channels = sequence->channels; in start_read()
136 while (channels) { in start_read()
138 index = find_lsb_set(channels) - 1; in start_read()
149 channels &= ~BIT(index); in start_read()
174 data->channel_id = find_lsb_set(data->channels) - 1; in adc_gecko_start_channel()
192 data->channels = ctx->sequence.channels; in adc_context_start_sampling()
236 data->channels &= ~BIT(data->channel_id); in adc_gecko_isr()
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Dadc_emul.c81 uint32_t channels; member
282 uint8_t channels = 0; in adc_emul_check_buffer_size() local
287 if (mask & sequence->channels) { in adc_emul_check_buffer_size()
288 channels++; in adc_emul_check_buffer_size()
292 needed = channels * sizeof(adc_emul_res_t); in adc_emul_check_buffer_size()
330 if (find_msb_set(sequence->channels) > config->num_channels) { in adc_emul_start_read()
332 sequence->channels); in adc_emul_start_read()
374 data->channels = ctx->sequence.channels; in adc_context_start_sampling()
482 while (data->channels) { in adc_emul_acquisition_thread()
484 unsigned int chan = find_lsb_set(data->channels) - 1; in adc_emul_acquisition_thread()
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/Zephyr-Core-3.5.0/tests/bsim/bluetooth/host/l2cap/general/src/
Dmain_l2cap_ecred.c53 static struct channel channels[L2CAP_CHANNELS]; variable
70 k_work_queue_init(&channels[i].work_queue); in init_workqs()
71 k_work_queue_start(&channels[i].work_queue, stack_area[i], in init_workqs()
104 if (channels[SHORT_MSG_CHAN_IDX].sdus_received != in chan_recv_cb()
105 (channels[LONG_MSG_CHAN_IDX].sdus_received + 1)) { in chan_recv_cb()
205 struct channel *chan = &channels[idx]; in get_free_channel()
212 channels[idx].in_use = true; in get_free_channel()
250 for (int i = 0; i < ARRAY_SIZE(channels); i++) { in disconnect_all_channels()
251 if (channels[i].in_use) { in disconnect_all_channels()
252 LOG_DBG("Disconnecting channel: %d)", channels[i].chan_id); in disconnect_all_channels()
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/Zephyr-Core-3.5.0/tests/drivers/build_all/sensor/
Dadc.dtsi14 io-channels = <&test_adc 0>;
20 io-channels = <&test_adc 1>;
30 io-channels = <&test_adc 2>;
48 io-channels = <&adc0 0>;
58 io-channels = <&adc0 0>;
67 io-channels = <&adc0 0>;
/Zephyr-Core-3.5.0/drivers/sensor/
Ddefault_rtio_sensor.c47 static inline int compute_num_samples(const enum sensor_channel *channels, size_t num_channels) in compute_num_samples() argument
52 num_samples += SENSOR_CHANNEL_3_AXIS(channels[i]) ? 3 : 1; in compute_num_samples()
98 if (header->channels[i] == channel) { in check_header_contains_channel()
114 const enum sensor_channel *const channels = cfg->channels; in sensor_submit_fallback() local
115 const int num_output_samples = compute_num_samples(channels, cfg->count); in sensor_submit_fallback()
149 const int num_samples = SENSOR_CHANNEL_3_AXIS(channels[i]) ? 3 : 1; in sensor_submit_fallback()
152 rc = sensor_channel_get(dev, channels[i], value); in sensor_submit_fallback()
155 header->channels[sample_idx++] = in sensor_submit_fallback()
156 rc == 0 ? channels[i] - 3 : SENSOR_CHAN_MAX; in sensor_submit_fallback()
157 header->channels[sample_idx++] = in sensor_submit_fallback()
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/Zephyr-Core-3.5.0/drivers/counter/
Dcounter_mcux_ctimer.c30 struct mcux_lpc_ctimer_channel_data channels[NUM_CHANNELS]; member
107 if (data->channels[chan_id].alarm_callback != NULL) { in mcux_lpc_ctimer_set_alarm()
119 data->channels[chan_id].alarm_callback = alarm_cfg->callback; in mcux_lpc_ctimer_set_alarm()
120 data->channels[chan_id].alarm_user_data = alarm_cfg->user_data; in mcux_lpc_ctimer_set_alarm()
141 data->channels[chan_id].alarm_callback = NULL; in mcux_lpc_ctimer_cancel_alarm()
142 data->channels[chan_id].alarm_user_data = NULL; in mcux_lpc_ctimer_cancel_alarm()
233 (data->channels[chan].alarm_callback != NULL)) { in mcux_lpc_ctimer_isr()
235 data->channels[chan].alarm_callback; in mcux_lpc_ctimer_isr()
236 void *alarm_user_data = data->channels[chan].alarm_user_data; in mcux_lpc_ctimer_isr()
238 data->channels[chan].alarm_callback = NULL; in mcux_lpc_ctimer_isr()
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/Zephyr-Core-3.5.0/dts/arm/gigadevice/gd32e50x/
Dgd32e507xe.dtsi20 channels = <4>;
37 channels = <2>;
54 channels = <1>;
71 channels = <1>;
88 channels = <2>;
105 channels = <1>;
122 channels = <1>;
/Zephyr-Core-3.5.0/include/zephyr/drivers/
Dled_strip.h71 uint8_t *channels,
126 uint8_t *channels, in led_strip_update_channels() argument
131 return api->update_channels(dev, channels, num_channels); in led_strip_update_channels()
/Zephyr-Core-3.5.0/drivers/dai/intel/hda/
Dhda.c35 if (config->channels) in dai_hda_set_config_tplg()
36 hda->params.channels = config->channels; in dai_hda_set_config_tplg()
54 params->channels = hda->params.channels; in dai_hda_config_get()
/Zephyr-Core-3.5.0/drivers/pwm/
Dpwm_b91.c17 uint8_t channels; member
65 if (channel >= config->channels) { in pwm_b91_set_cycles()
99 if (channel >= config->channels) { in pwm_b91_get_cycles_per_sec()
125 .channels = DT_INST_PROP(n, channels), \
/Zephyr-Core-3.5.0/samples/subsys/zbus/remote_mock/
Dremote_mock.py16 channels = json.loads(j) variable
25 channel_name = channels[channel_id]['name']
26 msg_size = channels[channel_id]['message_size']
/Zephyr-Core-3.5.0/drivers/dai/intel/alh/
Dalh.c34 if (config->channels && config->rate) { in dai_alh_set_config_tplg()
35 alh->params.channels = config->channels; in dai_alh_set_config_tplg()
37 LOG_INF("%s channels %d rate %d", __func__, config->channels, config->rate); in dai_alh_set_config_tplg()
60 alh->params.channels = POPCOUNT(alh_cfg->mapping[i].channel_mask); in dai_alh_set_config_blob()
118 params->channels = alh->params.channels; in dai_alh_config_get()
/Zephyr-Core-3.5.0/samples/sensor/accel_polling/src/
Dmain.c22 static const enum sensor_channel channels[] = { enum
39 for (size_t i = 0; i < ARRAY_SIZE(channels); i++) { in print_accels()
40 ret = sensor_channel_get(dev, channels[i], &accel[i]); in print_accels()
/Zephyr-Core-3.5.0/drivers/sensor/mcux_acmp/
Dmcux_acmp.c59 acmp_channel_config_t channels; member
145 data->channels.positivePortInput = val1; in mcux_acmp_attr_set()
146 ACMP_SetChannelConfig(config->base, &data->channels); in mcux_acmp_attr_set()
155 data->channels.plusMuxInput = val1; in mcux_acmp_attr_set()
156 ACMP_SetChannelConfig(config->base, &data->channels); in mcux_acmp_attr_set()
166 data->channels.negativePortInput = val1; in mcux_acmp_attr_set()
167 ACMP_SetChannelConfig(config->base, &data->channels); in mcux_acmp_attr_set()
176 data->channels.minusMuxInput = val1; in mcux_acmp_attr_set()
177 ACMP_SetChannelConfig(config->base, &data->channels); in mcux_acmp_attr_set()
285 val->val1 = data->channels.positivePortInput; in mcux_acmp_attr_get()
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/Zephyr-Core-3.5.0/dts/arm/gigadevice/gd32e10x/
Dgd32e10x.dtsi116 num-channels = <2>;
248 channels = <4>;
265 channels = <4>;
282 channels = <4>;
299 channels = <4>;
316 channels = <4>;
333 channels = <0>;
344 channels = <0>;
356 channels = <4>;
373 channels = <2>;
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