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Searched refs:cfg1 (Results 1 – 5 of 5) sorted by relevance

/Zephyr-Core-3.5.0/drivers/gpio/
Dgpio_intel.c219 uint32_t raw_pin, reg, cfg0, cfg1; in gpio_intel_config() local
237 cfg1 = sys_read32(reg + 4); in gpio_intel_config()
269 cfg1 &= ~(PAD_CFG1_TERM_MASK | PAD_CFG1_IOSTERM_MASK); in gpio_intel_config()
271 cfg1 |= (PAD_CFG1_TERM_PU_20K | PAD_CFG1_IOSTERM_PU); in gpio_intel_config()
273 cfg1 |= (PAD_CFG1_TERM_PD_20K | PAD_CFG1_IOSTERM_PD); in gpio_intel_config()
275 cfg1 |= (PAD_CFG1_TERM_NONE | PAD_CFG1_IOSTERM_FUNC); in gpio_intel_config()
279 cfg1 &= ~PAD_CFG1_IOSSTATE_MASK; in gpio_intel_config()
283 sys_write32(cfg1, reg + 4); in gpio_intel_config()
295 uint32_t raw_pin, cfg0, cfg1; in gpio_intel_pin_interrupt_configure() local
318 cfg1 = sys_read32(reg + 4); in gpio_intel_pin_interrupt_configure()
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/Zephyr-Core-3.5.0/tests/unit/timeutil/
Dtest_sync.c13 static const struct timeutil_sync_config cfg1 = { variable
103 .cfg = &cfg1, in test_state_set_skew()
157 .cfg = &cfg1, in test_estimate_skew()
160 .ref = cfg1.ref_Hz, in test_estimate_skew()
163 .ref = si0.ref + cfg1.ref_Hz, in test_estimate_skew()
164 .local = si0.local + cfg1.local_Hz, in test_estimate_skew()
288 tref_from_local("std", &cfg1); in test_ref_from_local()
356 tlocal_from_ref("std", &cfg1); in test_local_from_ref()
/Zephyr-Core-3.5.0/drivers/clock_control/
Dclock_control_gd32.c141 uint32_t cfg1 = sys_read32(config->base + RCU_CFG1_OFFSET); in clock_control_gd32_get_rate() local
155 if ((cfg1 & RCU_CFG1_TIMERSEL_MSK) == 0U) { in clock_control_gd32_get_rate()
/Zephyr-Core-3.5.0/drivers/usb_c/tcpc/
Ducpd_stm32.c1384 uint32_t cfg1; in ucpd_init() local
1413 cfg1 = LL_UCPD_ReadReg(config->ucpd_port, CFG1); in ucpd_init()
1414 cfg1 |= LL_UCPD_ORDERSET_SOP | LL_UCPD_ORDERSET_SOP1 | in ucpd_init()
1416 LL_UCPD_WriteReg(config->ucpd_port, CFG1, cfg1); in ucpd_init()
/Zephyr-Core-3.5.0/drivers/i3c/
Di3c_cdns.c2067 uint32_t cfg1 = sys_read32(config->base + CONF_STATUS1); in cdns_i3c_read_hw_cfg() local
2070 data->hw_cfg.cmd_mem_depth = CONF_STATUS1_CMD_DEPTH(cfg1) * 4; in cdns_i3c_read_hw_cfg()
2071 data->hw_cfg.rx_mem_depth = CONF_STATUS1_RX_DEPTH(cfg1) * 4; in cdns_i3c_read_hw_cfg()
2072 data->hw_cfg.tx_mem_depth = CONF_STATUS1_TX_DEPTH(cfg1) * 4; in cdns_i3c_read_hw_cfg()