| /Zephyr-Core-3.5.0/tests/boards/intel_adsp/cache/src/ |
| D | main.c | 13 uint32_t *cached, *uncached; in ZTEST() local
15 cached = (uint32_t *)LP_SRAM_BASE; in ZTEST()
16 uncached = arch_xtensa_uncached_ptr(cached); in ZTEST()
18 *cached = 42; in ZTEST()
22 zassert_equal(*cached, 42, NULL); in ZTEST()
28 zassert_equal(*cached, 42, NULL); in ZTEST()
36 zassert_equal(*cached, 80, NULL); in ZTEST()
39 *cached = 82; in ZTEST()
42 zassert_equal(*cached, 82, NULL); in ZTEST()
48 zassert_equal(*cached, 82, NULL); in ZTEST()
[all …]
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| /Zephyr-Core-3.5.0/subsys/logging/ |
| D | log_mgmt.c | 214 uint8_t *cached; in link_source_name_get() local
224 if (!log_cache_get(&sname_cache, id.raw, &cached)) { in link_source_name_get()
232 cached, &cache_size); in link_source_name_get()
237 log_cache_put(&sname_cache, cached); in link_source_name_get()
240 return (const char *)cached; in link_source_name_get()
263 uint8_t *cached; in link_domain_name_get() local
269 if (!log_cache_get(&dname_cache, id, &cached)) { in link_domain_name_get()
276 err = log_link_get_domain_name(link, rel_domain_id, cached, &cache_size); in link_domain_name_get()
278 log_cache_release(&dname_cache, cached); in link_domain_name_get()
282 log_cache_put(&dname_cache, cached); in link_domain_name_get()
[all …]
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| /Zephyr-Core-3.5.0/soc/arm/aspeed/ast10x0/ |
| D | Kconfig.soc | 17 The non-cached SRAM size in kB. The default value comes from reg[1]
24 The non-cached SRAM base address. The default value comes from from
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| /Zephyr-Core-3.5.0/doc/develop/sca/ |
| D | sparse.rst | 14 ``__cache`` used to identify pointers from the cached address range on the
15 Xtensa architecture. This helps identify cases where cached and uncached
|
| /Zephyr-Core-3.5.0/tests/kernel/mp/ |
| D | Kconfig | 6 # the shared variables in cached/incoherent memory.
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| /Zephyr-Core-3.5.0/boards/arm/mr_canhubk3/ |
| D | mr_canhubk3_defconfig | 18 # Use no-cached memory for HAL
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| /Zephyr-Core-3.5.0/arch/common/ |
| D | nocache.ld | 10 /* Non-cached region of RAM */
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| /Zephyr-Core-3.5.0/arch/xtensa/ |
| D | Kconfig | 79 so that it can be seen in both (incoherent) cached mappings
88 Region Protection Option) contains the "cached" mapping.
165 bool "Map memory in cached and uncached region"
169 distinct region, cached and uncached.
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| /Zephyr-Core-3.5.0/boards/arm/mimxrt1160_evk/ |
| D | mimxrt1160_evk_cm4.dts | 19 * a memory region that is not cached by the chip. If the chosen
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| /Zephyr-Core-3.5.0/soc/xtensa/intel_adsp/ace/ |
| D | ace-link.ld | 353 /* This section is cached. By default it contains only declared
356 .cached SEGSTART_CACHED : {
358 *(.cached .cached.*)
426 /* Non-loadable sections below. Back to cached memory so
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| /Zephyr-Core-3.5.0/boards/arm/mimxrt1170_evk/ |
| D | mimxrt1170_evk_cm4.dts | 19 * a memory region that is not cached by the chip. If the chosen
|
| /Zephyr-Core-3.5.0/include/zephyr/linker/ |
| D | section_tags.h | 57 #define __incoherent __in_section_unique(cached)
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| /Zephyr-Core-3.5.0/soc/xtensa/intel_adsp/cavs/include/ |
| D | xtensa-cavs-linker.ld | 385 /* This section is cached. By default it contains only declared
388 .cached SEGSTART_CACHED : {
390 *(.cached .cached.*)
440 /* Non-loadable sections below. Back to cached memory so
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| /Zephyr-Core-3.5.0/arch/arc/ |
| D | CMakeLists.txt | 17 # Instruct compiler to use proper register as cached thread pointer for thread local storage.
|
| /Zephyr-Core-3.5.0/subsys/bluetooth/controller/ll_sw/ |
| D | ull_conn_types.h | 78 struct pdu_data_llctrl_version_ind cached; member
|
| D | ull_llcp_pdu.c | 289 p->version_number = conn->llcp.vex.cached.version_number; in llcp_ntf_encode_version_ind()
290 p->company_id = sys_cpu_to_le16(conn->llcp.vex.cached.company_id); in llcp_ntf_encode_version_ind()
291 p->sub_version_number = sys_cpu_to_le16(conn->llcp.vex.cached.sub_version_number); in llcp_ntf_encode_version_ind()
297 conn->llcp.vex.cached.version_number = pdu->llctrl.version_ind.version_number; in llcp_pdu_decode_version_ind()
298 conn->llcp.vex.cached.company_id = sys_le16_to_cpu(pdu->llctrl.version_ind.company_id); in llcp_pdu_decode_version_ind()
299 conn->llcp.vex.cached.sub_version_number = in llcp_pdu_decode_version_ind()
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| /Zephyr-Core-3.5.0/cmake/modules/ |
| D | FindHostTools.cmake | 99 # Set cached ZEPHYR_TOOLCHAIN_VARIANT.
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| /Zephyr-Core-3.5.0/boards/arm/frdm_k82f/ |
| D | frdm_k82f.dts | 36 * a memory region that is not cached by the chip. If the chosen
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| /Zephyr-Core-3.5.0/tests/cmake/zephyr_get/ |
| D | CMakeLists.txt | 103 # Environment value is cached after it's retrieved.
184 # Environment is not cached when using MERGE.
329 # If an environment value wins, it is cached afterwards.
563 # If an environment value wins, it gets cached and promoted above snippets.
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| /Zephyr-Core-3.5.0/drivers/modem/ |
| D | Kconfig.gsm | 119 helpful if your modem has a tendency to get stuck due to cached
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| /Zephyr-Core-3.5.0/boards/arm/twr_ke18f/ |
| D | twr_ke18f.dts | 43 * a memory region that is not cached by the chip. If the chosen
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| /Zephyr-Core-3.5.0/share/zephyr-package/cmake/ |
| D | ZephyrConfig.cmake | 97 include_boilerplate("Zephyr base (cached)")
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| /Zephyr-Core-3.5.0/boards/arm/rddrone_fmuk66/ |
| D | rddrone_fmuk66.dts | 33 * a memory region that is not cached by the chip. If the chosen
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| /Zephyr-Core-3.5.0/drivers/wifi/esp32/ |
| D | Kconfig.esp32 | 145 size of the cached TX queue.
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| /Zephyr-Core-3.5.0/doc/kernel/services/smp/ |
| D | smp.rst | 270 and cached the resulting "next thread" pointer in a location where
274 the scheduler (for example: it might already be running that cached
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