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Searched refs:bus_width (Results 1 – 14 of 14) sorted by relevance

/Zephyr-Core-3.5.0/drivers/disk/
Dmmc_subsys.c24 uint8_t bus_width; member
111 data->card.bus_width = config->bus_width; in disk_mmc_init()
121 .bus_width = DT_INST_PROP(n, bus_width), \
Dsdmmc_stm32.c677 #if DT_INST_PROP(0, bus_width) == 1
679 #elif DT_INST_PROP(0, bus_width) == 4
681 #elif DT_INST_PROP(0, bus_width) == 8
/Zephyr-Core-3.5.0/include/zephyr/sd/
Dsd.h67 uint8_t bus_width; /*!< Desired bus width */ member
Dsd_spec.h654 uint8_t bus_width; member
/Zephyr-Core-3.5.0/subsys/sd/
Dmmc.c383 if (card->host_props.host_caps.bus_8_bit_support && card->bus_width == 8) { in mmc_set_bus_width()
385 card->bus_io.bus_width = SDHC_BUS_WIDTH8BIT; in mmc_set_bus_width()
386 } else if (card->host_props.host_caps.bus_4_bit_support && card->bus_width >= 4) { in mmc_set_bus_width()
388 card->bus_io.bus_width = SDHC_BUS_WIDTH4BIT; in mmc_set_bus_width()
467 (card->bus_io.bus_width >= SDHC_BUS_WIDTH4BIT)) { in mmc_set_timing()
525 (card->bus_io.bus_width == SDHC_BUS_WIDTH8BIT)) { in mmc_set_timing()
604 ext->bus_width = raw[183U]; in mmc_decode_ext_csd()
Dsd.c128 bus_io->bus_width = SDHC_BUS_WIDTH1BIT; in sd_init_io()
Dsdmmc.c262 card->bus_io.bus_width = width; in sdmmc_set_bus_width()
/Zephyr-Core-3.5.0/drivers/sdhc/
Dintel_emmc_host.c1014 LOG_DBG("emmc I/O: DW %d, Clk %d Hz, card power state %s, voltage %s", ios->bus_width, in emmc_set_io()
1040 if (host_io->bus_width != ios->bus_width) { in emmc_set_io()
1041 LOG_DBG("bus_width: %d", host_io->bus_width); in emmc_set_io()
1043 if (ios->bus_width == SDHC_BUS_WIDTH4BIT) { in emmc_set_io()
1046 ios->bus_width == SDHC_BUS_WIDTH8BIT ? 1 : 0); in emmc_set_io()
1050 ios->bus_width == SDHC_BUS_WIDTH4BIT ? 1 : 0); in emmc_set_io()
1052 host_io->bus_width = ios->bus_width; in emmc_set_io()
1336 .dw_4bit = DT_INST_ENUM_HAS_VALUE(n, bus_width, 4), \
1337 .dw_8bit = DT_INST_ENUM_HAS_VALUE(n, bus_width, 8), \
Dimx_usdhc.c250 ios->bus_width, in imx_usdhc_set_io()
281 if (host_io->bus_width != ios->bus_width) { in imx_usdhc_set_io()
282 switch (ios->bus_width) { in imx_usdhc_set_io()
295 host_io->bus_width = ios->bus_width; in imx_usdhc_set_io()
509 if (dev_data->host_io.bus_width == SDHC_BUS_WIDTH8BIT) { in imx_usdhc_execute_tuning()
Dsam_hsmci.c125 ios->bus_width, ios->timing, ios->bus_mode); in sam_hsmci_set_io()
158 if (ios->bus_width) { in sam_hsmci_set_io()
161 switch (ios->bus_width) { in sam_hsmci_set_io()
Dmcux_sdif.c157 switch (ios->bus_width) { in mcux_sdif_set_io()
Dsdhc_spi.c696 if (ios->bus_width != SDHC_BUS_WIDTH1BIT) { in sdhc_spi_set_io()
/Zephyr-Core-3.5.0/tests/drivers/sdhc/src/
Dmain.c60 io.bus_width = SDHC_BUS_WIDTH1BIT; in ZTEST()
/Zephyr-Core-3.5.0/include/zephyr/drivers/
Dsdhc.h212 enum sdhc_bus_width bus_width; /*!< SD bus width */ member