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Searched refs:STM32_PLL2_PREDIV (Results 1 – 2 of 2) sorted by relevance

/Zephyr-Core-3.5.0/drivers/clock_control/
Dclock_stm32f1.c147 pll_div = ((STM32_PLL2_PREDIV - 1) << RCC_CFGR2_PREDIV2_Pos); in config_pll2()
/Zephyr-Core-3.5.0/include/zephyr/drivers/clock_control/
Dstm32_clock_control.h217 #define STM32_PLL2_PREDIV DT_PROP(DT_NODELABEL(pll2), prediv) macro