Searched refs:REG_PWR_MGMT0 (Results 1 – 6 of 6) sorted by relevance
| /Zephyr-Core-3.5.0/drivers/sensor/icm42605/ |
| D | icm42605_setup.c | 225 result = inv_spi_single_write(&cfg->spi, REG_PWR_MGMT0, &v); in icm42605_sensor_init()
409 result = inv_spi_single_write(&cfg->spi, REG_PWR_MGMT0, &v); in icm42605_turn_on_sensor()
432 result = inv_spi_read(&cfg->spi, REG_PWR_MGMT0, &v, 1); in icm42605_turn_off_sensor()
437 result = inv_spi_single_write(&cfg->spi, REG_PWR_MGMT0, &v); in icm42605_turn_off_sensor()
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| D | icm42605_reg.h | 46 #define REG_PWR_MGMT0 0x4E macro
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| /Zephyr-Core-3.5.0/drivers/sensor/icm42688/ |
| D | icm42688_common.c | 99 LOG_DBG("PWR_MGMT0 (0x%x) 0x%x", REG_PWR_MGMT0, pwr_mgmt0); in icm42688_configure()
100 res = icm42688_spi_single_write(&dev_cfg->spi, REG_PWR_MGMT0, pwr_mgmt0); in icm42688_configure()
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| D | icm42688_reg.h | 74 #define REG_PWR_MGMT0 (REG_BANK0_OFFSET | 0x4E) macro
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| /Zephyr-Core-3.5.0/drivers/sensor/icm42670/ |
| D | icm42670_reg.h | 53 #define REG_PWR_MGMT0 (REG_BANK0_OFFSET | 0x1f) macro
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| D | icm42670.c | 161 int res = icm42670_spi_single_write(&cfg->spi, REG_PWR_MGMT0, BIT_IDLE); in icm42670_enable_mclk()
266 res = icm42670_spi_update_register(&cfg->spi, REG_PWR_MGMT0, in icm42670_turn_on_sensor()
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