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Searched refs:MPU_RASR_S_Msk (Results 1 – 2 of 2) sorted by relevance

/Zephyr-Core-3.5.0/include/zephyr/arch/arm/mpu/
Darm_mpu_v7m.h49 #define STRONGLY_ORDERED_SHAREABLE MPU_RASR_S_Msk
50 #define DEVICE_SHAREABLE (MPU_RASR_B_Msk | MPU_RASR_S_Msk)
52 (MPU_RASR_C_Msk | MPU_RASR_S_Msk)
55 (MPU_RASR_C_Msk | MPU_RASR_B_Msk | MPU_RASR_S_Msk)
59 ((1 << MPU_RASR_TEX_Pos) | MPU_RASR_S_Msk)
64 MPU_RASR_C_Msk | MPU_RASR_B_Msk | MPU_RASR_S_Msk)
/Zephyr-Core-3.5.0/include/zephyr/arch/arm/cortex_a_r/
Dmpu.h27 #define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) macro