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Searched refs:MIP_MEIP (Results 1 – 4 of 4) sorted by relevance

/Zephyr-Core-3.5.0/soc/riscv/riscv-ite/it8xxx2/
Dsoc.c207 csr_clear(mie, MIP_MEIP); in riscv_idle()
242 csr_set(mie, MIP_MEIP); in riscv_idle()
/Zephyr-Core-3.5.0/include/zephyr/arch/riscv/
Dcsr.h112 #define MIP_MEIP (1 << IRQ_M_EXT) macro
/Zephyr-Core-3.5.0/drivers/interrupt_controller/
Dintc_ite_it8xxx2_v2.c241 csr_set(mie, MIP_MEIP); in soc_interrupt_init()
Dintc_ite_it8xxx2.c251 csr_set(mie, MIP_MEIP); in soc_interrupt_init()