1 /*
2  * SPDX-License-Identifier: Apache-2.0
3  *
4  * Copyright 2023 NXP
5  */
6 
7 #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_ADC_MCUX_LPADC_H_
8 #define ZEPHYR_INCLUDE_DT_BINDINGS_ADC_MCUX_LPADC_H_
9 
10 #define MCUX_LPADC_CH0A (0x0)
11 #define MCUX_LPADC_CH0B (0x20)
12 #define MCUX_LPADC_CH1A (0x1)
13 #define MCUX_LPADC_CH1B (0x21)
14 #define MCUX_LPADC_CH2A (0x2)
15 #define MCUX_LPADC_CH2B (0x22)
16 #define MCUX_LPADC_CH3A (0x3)
17 #define MCUX_LPADC_CH3B (0x23)
18 #define MCUX_LPADC_CH4A (0x4)
19 #define MCUX_LPADC_CH4B (0x24)
20 #define MCUX_LPADC_CH5A (0x5)
21 #define MCUX_LPADC_CH5B (0x25)
22 #define MCUX_LPADC_CH6A (0x6)
23 #define MCUX_LPADC_CH6B (0x26)
24 #define MCUX_LPADC_CH7A (0x7)
25 #define MCUX_LPADC_CH7B (0x27)
26 #define MCUX_LPADC_CH8A (0x8)
27 #define MCUX_LPADC_CH8B (0x28)
28 
29 
30 #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_ADC_MCUX_LPADC_H_ */
31