Searched refs:I2S_STATE_READY (Results 1 – 7 of 7) sorted by relevance
346 stream->state != I2S_STATE_READY) { in i2s_litex_configure()425 stream->state = I2S_STATE_READY; in i2s_litex_configure()457 dev_data->tx.state != I2S_STATE_READY) { in i2s_litex_write()473 if (dev_data->tx.state == I2S_STATE_READY) { in i2s_litex_write()500 if (stream->state != I2S_STATE_READY) { in i2s_litex_trigger()514 stream->state != I2S_STATE_READY) { in i2s_litex_trigger()520 stream->state = I2S_STATE_READY; in i2s_litex_trigger()583 stream->state = I2S_STATE_READY; in i2s_litex_isr_tx()
201 stream->state != I2S_STATE_READY) { in i2s_stm32_configure()298 stream->state = I2S_STATE_READY; in i2s_stm32_configure()323 if (stream->state != I2S_STATE_READY) { in i2s_stm32_trigger()351 stream->state = I2S_STATE_READY; in i2s_stm32_trigger()364 stream->state = I2S_STATE_READY; in i2s_stm32_trigger()375 stream->state = I2S_STATE_READY; in i2s_stm32_trigger()383 stream->state = I2S_STATE_READY; in i2s_stm32_trigger()430 dev_data->tx.state != I2S_STATE_READY) { in i2s_stm32_write()574 stream->state = I2S_STATE_READY; in dma_rx_callback()614 stream->state = I2S_STATE_READY; in dma_tx_callback()[all …]
252 drv_data->state = I2S_STATE_READY; in data_handler()406 if (drv_data->state != I2S_STATE_READY) { in i2s_nrfx_configure()594 drv_data->state != I2S_STATE_READY) { in i2s_nrfx_write()704 if (drv_data->state == I2S_STATE_READY) { in clock_started_callback()746 drv_data->state = I2S_STATE_READY; in trigger_start()797 cmd_allowed = (drv_data->state == I2S_STATE_READY); in i2s_nrfx_trigger()850 if (drv_data->state != I2S_STATE_READY) { in i2s_nrfx_trigger()855 drv_data->state = I2S_STATE_READY; in i2s_nrfx_trigger()860 drv_data->state = I2S_STATE_READY; in i2s_nrfx_trigger()924 .state = I2S_STATE_READY, \
214 stream->state != I2S_STATE_READY) { in i2s_mcux_configure()289 stream->state = I2S_STATE_READY; in i2s_mcux_configure()467 stream->state = I2S_STATE_READY; in i2s_mcux_dma_tx_callback()496 stream->state = I2S_STATE_READY; in i2s_mcux_dma_tx_callback()567 stream->state = I2S_STATE_READY; in i2s_mcux_dma_rx_callback()697 if (stream->state != I2S_STATE_READY) { in i2s_mcux_trigger()744 stream->state = I2S_STATE_READY; in i2s_mcux_trigger()758 stream->state = I2S_STATE_READY; in i2s_mcux_trigger()817 stream->state != I2S_STATE_READY) { in i2s_mcux_write()
235 stream->state = I2S_STATE_READY; in dma_rx_callback()291 stream->state = I2S_STATE_READY; in dma_tx_callback()300 stream->state = I2S_STATE_READY; in dma_tx_callback()573 stream->state != I2S_STATE_READY) { in i2s_sam_configure()629 stream->state = I2S_STATE_READY; in i2s_sam_configure()807 if (stream->state != I2S_STATE_READY) { in i2s_sam_trigger()854 stream->state = I2S_STATE_READY; in i2s_sam_trigger()862 stream->state = I2S_STATE_READY; in i2s_sam_trigger()909 dev_data->tx.state != I2S_STATE_READY) { in i2s_sam_write()
295 strm->state = I2S_STATE_READY; in i2s_dma_tx_callback()324 strm->state = I2S_STATE_READY; in i2s_dma_tx_callback()421 strm->state = I2S_STATE_READY; in i2s_dma_rx_callback()476 (dev_data->tx.state != I2S_STATE_READY) && in i2s_mcux_config()478 (dev_data->rx.state != I2S_STATE_READY)) { in i2s_mcux_config()706 dev_data->tx.state = I2S_STATE_READY; in i2s_mcux_config()737 dev_data->rx.state = I2S_STATE_READY; in i2s_mcux_config()951 if (strm->state != I2S_STATE_READY) { in i2s_mcux_trigger()982 strm->state = I2S_STATE_READY; in i2s_mcux_trigger()1019 strm->state = I2S_STATE_READY; in i2s_mcux_trigger()[all …]
226 I2S_STATE_READY, enumerator
