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Searched refs:GICD_ISPENDRn (Results 1 – 2 of 2) sorted by relevance

/Zephyr-Core-3.5.0/include/zephyr/drivers/interrupt_controller/
Dgic.h77 #define GICD_ISPENDRn (GIC_DIST_BASE + 0x200) macro
/Zephyr-Core-3.5.0/drivers/interrupt_controller/
Dintc_gic.c77 enabler = sys_read32(GICD_ISPENDRn + int_grp * 4); in arm_gic_irq_is_pending()