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Searched refs:GICD_ICENABLERn (Results 1 – 2 of 2) sorted by relevance

/Zephyr-Core-3.5.0/drivers/interrupt_controller/
Dintc_gic.c53 sys_write32((1 << int_off), (GICD_ICENABLERn + int_grp * 4)); in arm_gic_irq_disable()
212 sys_write32(0xffffffff, GICD_ICENABLERn + i / 8); in gic_dist_init()
234 sys_write32(0xffff0000, GICD_ICENABLERn); in gic_cpu_init()
/Zephyr-Core-3.5.0/include/zephyr/drivers/interrupt_controller/
Dgic.h70 #define GICD_ICENABLERn (GIC_DIST_BASE + 0x180) macro