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Searched refs:DGCS_SCS (Results 1 – 1 of 1) sorted by relevance

/Zephyr-Core-3.5.0/soc/xtensa/intel_adsp/common/include/
Dintel_adsp_hda.h37 #define DGCS_SCS BIT(31) /* Sample container size */ macro
488 *DGCS(base, regblock_size, sid) |= DGCS_SCS; in intel_adsp_hda_set_sample_container_size()
490 *DGCS(base, regblock_size, sid) &= ~DGCS_SCS; in intel_adsp_hda_set_sample_container_size()