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Searched refs:DGCS_FWCB (Results 1 – 1 of 1) sorted by relevance

/Zephyr-Core-3.5.0/soc/xtensa/intel_adsp/common/include/
Dintel_adsp_hda.h41 #define DGCS_FWCB BIT(23) /* Firmware Control Buffer */ macro
126 *DGCS(base, regblock_size, sid) |= DGCS_FWCB; in intel_adsp_hda_init()