Home
last modified time | relevance | path

Searched refs:DGCS_BUR (Results 1 – 1 of 1) sorted by relevance

/Zephyr-Core-3.5.0/soc/xtensa/intel_adsp/common/include/
Dintel_adsp_hda.h46 #define DGCS_BUR BIT(10) /* Buffer Underrun */ macro
374 return (*DGCS(base, regblock_size, sid) & DGCS_BUR) == DGCS_BUR ? 1 : 0; in intel_adsp_hda_is_buffer_underrun()
386 *DGCS(base, regblock_size, sid) |= DGCS_BUR; in intel_adsp_hda_underrun_clear()