DGCS_BSCIE (reference) in projects: Zephyr-Core-3.5.0

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/Zephyr-Core-3.5.0/soc/xtensa/intel_adsp/common/include/
D	intel_adsp_hda.h	`50 #define DGCS_BSCIE BIT(3) /* Buffer Segment Completion Interrupt Enable / macro 428 DGCS(base, regblock_size, sid) \|= DGCS_BSCIE; in intel_adsp_hda_enable_buffer_interrupt() 441 *DGCS(base, regblock_size, sid) &= ~DGCS_BSCIE; in intel_adsp_hda_disable_buffer_interrupt()`

TraceRecorderSource-2.7.6
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Zephyr-Core-2.7.6
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babblesim_ext_2G4_channel_multiatt-3.4.0
babblesim_ext_2G4_channel_multiatt-3.7.0-3.6.0-3.5.0
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babblesim_ext_2G4_device_burst_interferer-3.7.0-3.6.0-3.5.0-3.4.0
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