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/Zephyr-Core-3.5.0/soc/xtensa/intel_adsp/common/include/
Dintel_adsp_hda.h73 #define DGBSP(base, regblock_size, stream) \ macro
111 *DGBSP(base, regblock_size, sid), \
400 *DGBSP(base, regblock_size, sid) = size; in intel_adsp_hda_set_buffer_segment_ptr()
415 return *DGBSP(base, regblock_size, sid); in intel_adsp_hda_get_buffer_segment_ptr()