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Searched refs:BITSTREAM (Results 1 – 2 of 2) sorted by relevance

/Zephyr-Core-3.5.0/drivers/fpga/
Dfpga_zynqmp.h28 #define BITSTREAM ((volatile uint32_t *) (0x01000000)) macro
Dfpga_zynqmp.c204 CSUDMA_SRC_ADDR = (uint32_t)BITSTREAM & CSUDMA_SRC_ADDR_MASK; in csudma_transfer()
296 *(BITSTREAM + i) = __bswap_32(*(addr + i)); in zynqmp_fpga_load()