1 /* Copyright (c) 2021 Intel Corporation 2 * SPDX-License-Identifier: Apache-2.0 3 */ 4 #ifndef _ZEPHYR_SOC_INTEL_ADSP_DEBUG_WINDOW 5 #define _ZEPHYR_SOC_INTEL_ADSP_DEBUG_WINDOW 6 7 #include <mem_window.h> 8 #include <zephyr/debug/sparse.h> 9 10 /* 11 * SRAM window for debug info (window 2) is organized in slots, 12 * described in the descriptors available on page 0. 13 * 14 * ------------------------ 15 * | Page0 - descriptors | 16 * ------------------------ 17 * | Page1 - slot0 | 18 * ------------------------ 19 * | Page2 - slot1 | 20 * ------------------------ 21 * | ... | 22 * ------------------------ 23 * | Page14 - slot13 | 24 * ------------------------ 25 * | Page15 - slot14 | 26 * ------------------------ 27 * 28 * The slot size == page size 29 * 30 * The first page contains descriptors for the remaining slots. 31 * The overall number of slots can vary based on platform. 32 * 33 * The slot descriptor is: 34 * u32 res_id; 35 * u32 type; 36 * u32 vma; 37 */ 38 39 #define ADSP_DW_PAGE_SIZE 0x1000 40 #define ADSP_DW_SLOT_SIZE ADSP_DW_PAGE_SIZE 41 #define ADSP_DW_SLOT_COUNT 15 42 43 /* debug log slot types */ 44 #define ADSP_DW_SLOT_UNUSED 0x00000000 45 #define ADSP_DW_SLOT_CRITICAL_LOG 0x54524300 46 #define ADSP_DW_SLOT_DEBUG_LOG 0x474f4c00 /* byte 0: core ID */ 47 #define ADSP_DW_SLOT_GDB_STUB 0x42444700 48 #define ADSP_DW_SLOT_TELEMETRY 0x4c455400 49 #define ADSP_DW_SLOT_BROKEN 0x44414544 50 51 /* for debug and critical types */ 52 #define ADSP_DW_SLOT_CORE_MASK GENMASK(7, 0) 53 #define ADSP_DW_SLOT_TYPE_MASK GENMASK(31, 8) 54 55 struct adsp_dw_desc { 56 uint32_t resource_id; 57 uint32_t type; 58 uint32_t vma; 59 } __packed; 60 61 struct adsp_debug_window { 62 struct adsp_dw_desc descs[ADSP_DW_SLOT_COUNT]; 63 uint8_t reserved[ADSP_DW_SLOT_SIZE - ADSP_DW_SLOT_COUNT * sizeof(struct adsp_dw_desc)]; 64 uint8_t slots[ADSP_DW_SLOT_COUNT][ADSP_DW_SLOT_SIZE]; 65 } __packed; 66 67 #define WIN2_MBASE DT_REG_ADDR(DT_PHANDLE(DT_NODELABEL(mem_window2), memory)) 68 69 #define ADSP_DW ((volatile struct adsp_debug_window *) \ 70 (z_soc_uncached_ptr((__sparse_force void __sparse_cache *) \ 71 (WIN2_MBASE + WIN2_OFFSET)))) 72 73 #endif 74