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/Zephyr-Core-3.4.0/tests/subsys/portability/cmsis_rtos_v1/src/
Dsignal.c27 int signals = osSignalSet((osThreadId)arg, SIGNAL1); in Thread_1() local
29 zassert_not_equal(signals, 0x80000000, ""); in Thread_1()
34 int signals = osSignalSet((osThreadId)arg, SIGNAL2); in Thread_2() local
36 zassert_not_equal(signals, 0x80000000, ""); in Thread_2()
42 int signals, sig_cnt; in test_multiple_signal_flags() local
48 signals = osSignalSet((osThreadId)thread_id, signal_each_flag); in test_multiple_signal_flags()
49 zassert_not_equal(signals, 0x80000000, in test_multiple_signal_flags()
53 signals = osSignalClear((osThreadId)thread_id, SIGNAL_ALL_FLAGS); in test_multiple_signal_flags()
54 zassert_not_equal(signals, 0x80000000, ""); in test_multiple_signal_flags()
57 signals = osSignalSet((osThreadId)thread_id, SIGNAL_ALL_FLAGS); in test_multiple_signal_flags()
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/Zephyr-Core-3.4.0/subsys/portability/cmsis_rtos_v1/
Dcmsis_signal.c20 int32_t osSignalSet(osThreadId thread_id, int32_t signals) in osSignalSet() argument
24 if ((thread_id == NULL) || (!signals) || in osSignalSet()
25 (signals & 0x80000000) || (signals > MAX_VALID_SIGNAL_VAL)) { in osSignalSet()
35 thread_def->signal_results |= signals; in osSignalSet()
38 k_poll_signal_raise(thread_def->poll_signal, signals); in osSignalSet()
46 int32_t osSignalClear(osThreadId thread_id, int32_t signals) in osSignalClear() argument
50 if (k_is_in_isr() || (thread_id == NULL) || (!signals) || in osSignalClear()
51 (signals & 0x80000000) || (signals > MAX_VALID_SIGNAL_VAL)) { in osSignalClear()
61 thread_def->signal_results &= ~(signals); in osSignalClear()
71 osEvent osSignalWait(int32_t signals, uint32_t millisec) in osSignalWait() argument
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/Zephyr-Core-3.4.0/doc/hardware/peripherals/
Dreset.rst9 Reset controllers are units that control the reset signals to multiple
11 control over their reset input signals, including the ability to assert,
12 deassert and toggle those signals. Also, the reset status of the reset input
16 in most cases we want to toggle the reset signals.
Dmbox.rst9 An MBOX device is a peripheral capable of passing signals (and data depending
Despi.rst16 (lower pin count) interface, SPI, SMBus and sideband signals.
/Zephyr-Core-3.4.0/scripts/utils/
Dpinctrl_nrf_migrate.py110 signals: Dict[str, str],
115 self.signals = signals
431 line = current_device.callback(config, current_device.signals, line)
457 config: DeviceConfiguration, signals: Dict[str, str], line: str
475 config.set_signal_pin(signals[f"io{i}"], int(pin))
480 config.set_signal_pin(signals[m.group(1)], int(m.group(2)))
491 def process_uart(config: DeviceConfiguration, signals, line: str) -> Optional[str]: argument
495 if not match_and_store_pin(config, signals, line):
501 config.add_signal_config(signals[m.group(1)], PIN_CONFIG.PULL_UP)
507 def process_spi(config: DeviceConfiguration, signals, line: str) -> Optional[str]: argument
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/Zephyr-Core-3.4.0/samples/tfm_integration/tfm_secure_partition/dummy_partition/
Ddummy_partition.c117 psa_signal_t signals = 0; in tfm_dp_req_mngr_init() local
120 signals = psa_wait(PSA_WAIT_ANY, PSA_BLOCK); in tfm_dp_req_mngr_init()
121 if (signals & TFM_DP_SECRET_DIGEST_SIGNAL) { in tfm_dp_req_mngr_init()
/Zephyr-Core-3.4.0/boards/shields/inventek_eswifi/doc/
Dindex.rst33 The Inventek's EVBs signals are 3.3V only.
42 The below table presents signals by interface. The UART switch SW3 must be on
43 position 3 to enable RX/TX signals when using es-WIFI with UART firmware.
46 The signals from D3 up to D7 are not connected by default on the Inventek's
47 shield. These signals marked as optional can help on development. The current
48 driver do not handle that signals and are simple suggestions and can be left
/Zephyr-Core-3.4.0/include/zephyr/portability/
Dcmsis_os.h232 int32_t signals; ///< signal flags member
420 int32_t osSignalSet (osThreadId thread_id, int32_t signals);
427 int32_t osSignalClear (osThreadId thread_id, int32_t signals);
434 osEvent osSignalWait (int32_t signals, uint32_t millisec);
/Zephyr-Core-3.4.0/tests/drivers/i2s/i2s_speed/
DReadme.txt8 signals externally on the EVK. These are the HW changes required to run this test:
/Zephyr-Core-3.4.0/samples/subsys/modbus/rtu_client/
DREADME.rst23 The shield converts UART TX, RX signals to RS-485.
32 Alternatively UART RX,TX signals of two boards can be connected crosswise.
/Zephyr-Core-3.4.0/drivers/ps2/
DKconfig.npcx11 Each channel has two quasi-bidirectional signals that serve as
/Zephyr-Core-3.4.0/boards/shields/semtech_sx1272mb2das/doc/
Dindex.rst41 The SX1272 signals DIO4 and DIO5 are not available at the shield connector.
/Zephyr-Core-3.4.0/boards/shields/semtech_sx1262mb2das/doc/
Dindex.rst39 The SX1262 signals DIO2 and DIO3 are not available at the shield connector.
/Zephyr-Core-3.4.0/samples/drivers/espi/
DREADME.rst14 Standard platform signals are sent virtual wire packets over the bus.
/Zephyr-Core-3.4.0/boards/shields/x_nucleo_idb05a1/doc/
Dindex.rst20 but CS and SCK signals are not the standard Arduino SPI_CS and SPI_SCK signals.
/Zephyr-Core-3.4.0/subsys/shell/
Dshell.c1158 &sh->ctx->signals[SHELL_SIGNAL_RXRDY] : in transport_evt_handler()
1159 &sh->ctx->signals[SHELL_SIGNAL_TXDONE]; in transport_evt_handler()
1178 &sh->ctx->signals[SHELL_SIGNAL_RXRDY]; in shell_log_process()
1212 k_poll_signal_init(&sh->ctx->signals[i]); in instance_init()
1216 &sh->ctx->signals[i]); in instance_init()
1284 struct k_poll_signal *sig = &sh->ctx->signals[sig_idx]; in shell_signal_handle()
1400 &sh->ctx->signals[SHELL_SIGNAL_KILL]; in shell_uninit()
/Zephyr-Core-3.4.0/tests/drivers/i2c/i2c_target_api/
DREADME.txt35 accomplished by hardware through having the SCL (and SDA) signals
/Zephyr-Core-3.4.0/boards/arm/stm32g071b_disco/doc/
Dindex.rst36 I2C communication signals
41 - USB Type-C™ test points for main signals
/Zephyr-Core-3.4.0/boards/arm/mimxrt1020_evk/doc/
Dindex.rst226 SWD signals are connected to the OpenSDA microcontroller.
236 SWD signals are disconnected from the OpenSDA microcontroller.
244 the factory) to connect UART signals to the OpenSDA microcontroller.
/Zephyr-Core-3.4.0/boards/shields/frdm_kw41z/doc/
Dindex.rst52 routes the UART RX and TX signals to the Arduino header, rather than to the
/Zephyr-Core-3.4.0/boards/arm/mimxrt1170_evk/
Dmimxrt1170_evk.dtsi61 * ethernet PHY reset signals.
/Zephyr-Core-3.4.0/boards/arm/mimxrt1160_evk/
Dmimxrt1160_evk.dtsi77 * ethernet PHY reset signals.
/Zephyr-Core-3.4.0/boards/arm/mimxrt1010_evk/doc/
Dindex.rst167 SWD signals are disconnected from the OpenSDA microcontroller.
175 the factory) to connect UART signals to the OpenSDA microcontroller.
/Zephyr-Core-3.4.0/boards/arm/mimxrt595_evk/doc/
Dindex.rst37 - Single row headers for ARDUINO signals and MikroBus connector
193 2. To connect the SWD signals to onboard debug circuit, install jumpers JP17, JP18 and JP19,
203 2. To disconnect the SWD signals from onboard debug circuit, **remove** jumpers J17, J18,

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