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Searched refs:reg_cache (Results 1 – 7 of 7) sorted by relevance

/Zephyr-Core-3.4.0/drivers/gpio/
Dgpio_mcp230xx.c83 .reg_cache.iodir = 0xFFFF, .reg_cache.ipol = 0x0, .reg_cache.gpinten = 0x0, \
84 .reg_cache.defval = 0x0, .reg_cache.intcon = 0x0, .reg_cache.iocon = 0x0, \
85 .reg_cache.gppu = 0x0, .reg_cache.intf = 0x0, .reg_cache.intcap = 0x0, \
86 .reg_cache.gpio = 0x0, .reg_cache.olat = 0x0, \
Dgpio_mcp23sxx.c121 .reg_cache.iodir = 0xFFFF, .reg_cache.ipol = 0x0, .reg_cache.gpinten = 0x0, \
122 .reg_cache.defval = 0x0, .reg_cache.intcon = 0x0, .reg_cache.iocon = 0x0, \
123 .reg_cache.gppu = 0x0, .reg_cache.intf = 0x0, .reg_cache.intcap = 0x0, \
124 .reg_cache.gpio = 0x0, .reg_cache.olat = 0x0, \
Dgpio_mcp23s17.c76 } reg_cache; member
168 uint16_t *dir = &drv_data->reg_cache.iodir; in setup_pin_dir()
169 uint16_t *output = &drv_data->reg_cache.gpio; in setup_pin_dir()
201 port = drv_data->reg_cache.gppu; in setup_pin_pullupdown()
212 drv_data->reg_cache.gppu = port; in setup_pin_pullupdown()
292 buf = drv_data->reg_cache.gpio; in mcp23s17_port_set_masked_raw()
297 drv_data->reg_cache.gpio = buf; in mcp23s17_port_set_masked_raw()
330 buf = drv_data->reg_cache.gpio; in mcp23s17_port_toggle_bits()
335 drv_data->reg_cache.gpio = buf; in mcp23s17_port_toggle_bits()
390 .reg_cache.iodir = 0xFFFF, \
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Dgpio_mcp23xxx.c94 drv_data->reg_cache.iocon = extended_value; in write_iocon()
111 uint16_t dir = drv_data->reg_cache.iodir; in setup_pin_dir()
112 uint16_t output = drv_data->reg_cache.gpio; in setup_pin_dir()
131 drv_data->reg_cache.gpio = output; in setup_pin_dir()
135 drv_data->reg_cache.iodir = dir; in setup_pin_dir()
155 port = drv_data->reg_cache.gppu; in setup_pin_pull()
165 drv_data->reg_cache.gppu = port; in setup_pin_pull()
237 buf = drv_data->reg_cache.gpio; in mcp23xxx_port_set_masked_raw()
242 drv_data->reg_cache.gpio = buf; in mcp23xxx_port_set_masked_raw()
271 buf = drv_data->reg_cache.gpio; in mcp23xxx_port_toggle_bits()
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Dgpio_fxl6408.c53 } reg_cache; member
121 &drv_data->reg_cache.input); in update_input_regs()
122 *buf = drv_data->reg_cache.input; in update_input_regs()
133 &drv_data->reg_cache.output, value); in update_output_regs()
142 &drv_data->reg_cache.high_z, value); in update_high_z_regs()
151 &drv_data->reg_cache.dir, value); in update_direction_regs()
160 &drv_data->reg_cache.pud_sel, value); in update_pul_sel_regs()
169 &drv_data->reg_cache.pud_en, value); in update_pul_en_regs()
176 uint8_t reg_dir = drv_data->reg_cache.dir; in setup_pin_dir()
177 uint8_t reg_out = drv_data->reg_cache.output; in setup_pin_dir()
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Dgpio_pca95xx.c93 } reg_cache; member
262 &drv_data->reg_cache.input, buf); in update_input_reg()
271 &drv_data->reg_cache.input, buf); in update_input_regs()
281 &drv_data->reg_cache.output, value); in update_output_reg()
290 &drv_data->reg_cache.output, value); in update_output_regs()
300 &drv_data->reg_cache.dir, value); in update_direction_reg()
310 &drv_data->reg_cache.pud_sel, value); in update_pul_sel_reg()
320 &drv_data->reg_cache.pud_en, value); in update_pul_en_reg()
331 write_port_reg(dev, REG_INPUT_LATCH_PORT0, pin, &drv_data->reg_cache.input_latch, ~value); in update_int_mask_reg()
334 &drv_data->reg_cache.int_mask, value); in update_int_mask_reg()
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Dgpio_mcp23xxx.h95 } reg_cache; member