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Searched refs:_ARC_V2_DC_FLDL (Results 1 – 2 of 2) sorted by relevance

/Zephyr-Core-3.4.0/arch/arc/core/
Dcache.c86 z_arc_v2_aux_reg_write(_ARC_V2_DC_FLDL, start_addr); in arch_dcache_flush_range()
/Zephyr-Core-3.4.0/include/zephyr/arch/arc/v2/
Daux_regs.h45 #define _ARC_V2_DC_FLDL 0x04c macro