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Searched refs:GD32_RESET_GPIOG (Results 1 – 6 of 6) sorted by relevance

/Zephyr-Core-3.4.0/include/zephyr/dt-bindings/reset/
Dgd32f403.h37 #define GD32_RESET_GPIOG GD32_RESET_CONFIG(APB2RST, 8U) macro
Dgd32e50x.h37 #define GD32_RESET_GPIOG GD32_RESET_CONFIG(APB2RST, 8U) macro
Dgd32f4xx.h38 #define GD32_RESET_GPIOG GD32_RESET_CONFIG(AHB1RST, 6U) macro
/Zephyr-Core-3.4.0/dts/arm/gigadevice/gd32e50x/
Dgd32e50x.dtsi292 resets = <&rctl GD32_RESET_GPIOG>;
/Zephyr-Core-3.4.0/dts/arm/gigadevice/gd32f403/
Dgd32f403.dtsi294 resets = <&rctl GD32_RESET_GPIOG>;
/Zephyr-Core-3.4.0/dts/arm/gigadevice/gd32f4xx/
Dgd32f4xx.dtsi366 resets = <&rctl GD32_RESET_GPIOG>;