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Searched refs:ESGCTRL1 (Results 1 – 3 of 3) sorted by relevance

/Zephyr-Core-3.4.0/soc/riscv/riscv-ite/common/
Dcheck_regs.c66 IT8XXX2_REG_OFFSET_CHECK(espi_slave_regs, ESGCTRL1, 0xa1);
Dchip_chipregs.h1929 volatile uint8_t ESGCTRL1; member
/Zephyr-Core-3.4.0/drivers/espi/
Despi_it8xxx2.c1907 slave_reg->ESGCTRL1 |= IT8XXX2_ESPI_INTERRUPT_ENABLE; in espi_it8xxx2_init()