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Searched refs:APB2DIV_VAL (Results 1 – 2 of 2) sorted by relevance

/Zephyr-Core-3.4.0/drivers/clock_control/
Dclock_control_npcx.c161 BUILD_ASSERT(APBSRC_CLK / (APB2DIV_VAL + 1) <= MHZ(50) &&
162 APBSRC_CLK / (APB2DIV_VAL + 1) >= MHZ(8) &&
163 (APB2DIV_VAL + 1) % (FPRED_VAL + 1) == 0,
210 inst_cdcg->HFCBCD1 = (APB1DIV_VAL | (APB2DIV_VAL << 4)); in npcx_clock_control_init()
/Zephyr-Core-3.4.0/soc/arm/nuvoton_npcx/common/
Dsoc_clock.h42 #define APB2DIV_VAL (DT_PROP(DT_NODELABEL(pcc), apb2_prescaler) - 1) macro