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/Zephyr-Core-2.7.6/tests/subsys/pm/power_states_api/src/
Dmain.c16 static enum pm_state states[] = {PM_STATE_SUSPEND_TO_IDLE, enum
30 zassert_true(ARRAY_SIZE(states) == dts_states_len, in test_power_states()
34 zassert_true(memcmp(states, dts_states, sizeof(dts_states)) == 0, in test_power_states()
/Zephyr-Core-2.7.6/tests/subsys/pm/power_states_api/boards/
Dnative_posix.overlay9 compatible = "test-power-states-api";
10 cpu-power-states = <&state0 &state1 &state2>;
/Zephyr-Core-2.7.6/doc/reference/power_management/
Dindex.rst27 SOC Power State describes processor and device power states implemented at
28 the SOC level. Power states are represented by :c:enum:`pm_state` and each
61 Subsystem can put an idle system in one of the supported power states, based
89 The power management subsystem contains a set of states based on
92 The list of available power states is defined by :c:enum:`pm_state`. In
93 general power states with higher indexes will offer greater power savings and
94 have higher wake latencies. Following is a thorough list of available states:
116 applications to set constraints on various power states preventing the
117 system from transitiioning into these states. This can be used by devices when executing
137 power state the system should transition to based on states defined by the
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/Zephyr-Core-2.7.6/boards/arm/mec1501modular_assy6885/
Dmec1501modular_assy6885.dts31 power-states {
47 cpu-power-states = <&idle &suspend_to_ram>;
/Zephyr-Core-2.7.6/kernel/include/
Dksched.h170 static inline void z_set_thread_states(struct k_thread *thread, uint32_t states) in z_set_thread_states() argument
172 thread->base.thread_state |= states; in z_set_thread_states()
176 uint32_t states) in z_reset_thread_states() argument
178 thread->base.thread_state &= ~states; in z_reset_thread_states()
/Zephyr-Core-2.7.6/tests/subsys/pm/device_wakeup_api/
DCMakeLists.txt7 project(pm-states-test)
/Zephyr-Core-2.7.6/tests/subsys/pm/power_states_api/
DCMakeLists.txt7 project(pm-states-test)
/Zephyr-Core-2.7.6/drivers/led/
DKconfig.pca963311 states. Each channel can drive up to 25 mA per LED.
DKconfig.lp394311 states at a specified rate. Each channel can drive up to 25 mA
/Zephyr-Core-2.7.6/boards/arm/cc1352r1_launchxl/
Dcc1352r1_launchxl.dts63 power-states {
81 cpu-power-states = <&idle &standby>;
/Zephyr-Core-2.7.6/boards/arm/cc26x2r1_launchxl/
Dcc26x2r1_launchxl.dts63 power-states {
81 cpu-power-states = <&idle &standby>;
/Zephyr-Core-2.7.6/boards/arm/npcx7m6fb_evb/
Dnpcx7m6fb_evb.dts37 power-states {
59 cpu-power-states = <&suspend_to_idle0 &suspend_to_idle1>;
/Zephyr-Core-2.7.6/boards/arm/stm32l562e_dk/
Dstm32l562e_dk_ns.dts31 cpu-power-states = <&stop0 &stop1 &stop2>;
Dstm32l562e_dk.dts31 cpu-power-states = <&stop0 &stop1 &stop2>;
/Zephyr-Core-2.7.6/boards/arm/mec15xxevb_assy6853/
Dmec15xxevb_assy6853.dts58 power-states {
74 cpu-power-states = <&idle &suspend_to_ram>;
/Zephyr-Core-2.7.6/boards/arm/npcx9m6f_evb/
Dnpcx9m6f_evb.dts49 power-states {
71 cpu-power-states = <&suspend_to_idle0 &suspend_to_idle1>;
/Zephyr-Core-2.7.6/boards/arm/nucleo_g071rb/
Dnucleo_g071rb.dts24 power-states {
160 cpu-power-states = <&stop0 &stop1>;
/Zephyr-Core-2.7.6/boards/arm/cc1352r_sensortag/
Dcc1352r_sensortag.dts72 power-states {
90 cpu-power-states = <&idle &standby>;
/Zephyr-Core-2.7.6/boards/arm/nucleo_l476rg/
Dnucleo_l476rg.dts23 power-states {
87 cpu-power-states = <&stop0 &stop1 &stop2>;
/Zephyr-Core-2.7.6/boards/arm/nucleo_g0b1re/
Dnucleo_g0b1re.dts25 power-states {
188 cpu-power-states = <&stop0 &stop1>;
/Zephyr-Core-2.7.6/boards/arm/b_l072z_lrwan1/
Db_l072z_lrwan1.dts61 power-states {
71 cpu-power-states = <&stop>;
/Zephyr-Core-2.7.6/boards/arm/nucleo_wl55jc/
Dnucleo_wl55jc.dts64 power-states {
87 cpu-power-states = <&stop0 &stop1 &stop2>;
/Zephyr-Core-2.7.6/boards/arm64/fvp_baser_aemv8r/
Dboard.cmake19 -C gic_distributor.has-two-security-states=0
/Zephyr-Core-2.7.6/boards/arm/nucleo_wb55rg/
Dnucleo_wb55rg.dts25 power-states {
105 cpu-power-states = <&stop0 &stop1 &stop2>;
/Zephyr-Core-2.7.6/samples/boards/stm32/power_mgmt/blinky/
DREADME.rst20 in core sleep states, as LPTIM (:ref:`dtbinding_st_stm32_lptim`).

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