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/Zephyr-Core-2.7.6/doc/reference/memory_management/
Ddemand_paging.rst8 conceptually divided in page-sized page frames as regions to hold data.
10 * When the processor tries to access data and the data page exists in
11 one of the page frames, the execution continues without any interruptions.
13 * When the processor tries to access the data page that does not exist
14 in any page frames, a page fault occurs. The paging code then brings in
15 the corresponding data page from backing store into physical memory if
16 there is a free page frame. If there is no more free page frames,
17 the eviction algorithm is invoked to select a data page to be paged out,
18 thus freeing up a page frame for new data to be paged in. If this data
19 page has been modified after it is first paged in, the data will be
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/Zephyr-Core-2.7.6/drivers/flash/
Dflash_stm32g0x.c119 int page; in erase_page() local
140 page = offset / STM32G0_FLASH_PAGE_SIZE; in erase_page()
146 if ((page >= STM32G0_PAGES_PER_BANK) != swap_enabled) { in erase_page()
147 page = (page % STM32G0_PAGES_PER_BANK) + STM32G0_BANK2_START_PAGE_NR; in erase_page()
149 LOG_DBG("Erase page %d on bank 2", page); in erase_page()
151 page = page % STM32G0_PAGES_PER_BANK; in erase_page()
153 LOG_DBG("Erase page %d on bank 1", page); in erase_page()
160 tmp |= ((page << FLASH_CR_PNB_Pos) & FLASH_CR_PNB_Msk); in erase_page()
Dflash_stm32g4x.c146 int page; in erase_page() local
168 page = offset / FLASH_PAGE_SIZE; in erase_page()
169 LOG_DBG("Erase page %d on bank 1", page); in erase_page()
173 page = (offset - BANK2_OFFSET) / FLASH_PAGE_SIZE; in erase_page()
174 LOG_DBG("Erase page %d on bank 1", page); in erase_page()
178 page = offset / FLASH_PAGE_SIZE; in erase_page()
179 LOG_DBG("Erase page %d on bank 2", page); in erase_page()
183 page = (offset - BANK2_OFFSET) / FLASH_PAGE_SIZE; in erase_page()
184 LOG_DBG("Erase page %d on bank 2", page); in erase_page()
190 page = offset / FLASH_PAGE_SIZE; in erase_page()
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Dflash_stm32l5x.c187 int page; in erase_page() local
210 page = offset / FLASH_PAGE_SIZE; in erase_page()
211 LOG_DBG("Erase page %d on bank 1", page); in erase_page()
215 page = (offset - BANK2_OFFSET) / FLASH_PAGE_SIZE; in erase_page()
216 LOG_DBG("Erase page %d on bank 1", page); in erase_page()
220 page = offset / FLASH_PAGE_SIZE; in erase_page()
221 LOG_DBG("Erase page %d on bank 2", page); in erase_page()
225 page = (offset - BANK2_OFFSET) / FLASH_PAGE_SIZE; in erase_page()
226 LOG_DBG("Erase page %d on bank 2", page); in erase_page()
232 page = offset / FLASH_PAGE_SIZE; in erase_page()
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Dflash_page_layout.c79 size_t block, num_blocks, page = 0, i; in flash_page_foreach() local
90 page_info.index = page; in flash_page_foreach()
97 page++; in flash_page_foreach()
Dflash_stm32_v1.c60 static void erase_page_begin(FLASH_TypeDef *regs, unsigned int page) in erase_page_begin() argument
64 regs->AR = CONFIG_FLASH_BASE_ADDRESS + page * FLASH_PAGE_SIZE; in erase_page_begin()
98 static void erase_page_begin(FLASH_TypeDef *regs, unsigned int page) in erase_page_begin() argument
101 CONFIG_FLASH_BASE_ADDRESS + page * FLASH_PAGE_SIZE); in erase_page_begin()
Dflash_sam0.c200 int page; in flash_sam0_commit() local
214 for (page = 0; page < PAGES_PER_ROW; page++) { in flash_sam0_commit()
216 dev, offset + page * FLASH_PAGE_SIZE, in flash_sam0_commit()
217 &ctx->buf[page * FLASH_PAGE_SIZE]); in flash_sam0_commit()
/Zephyr-Core-2.7.6/tests/subsys/dfu/mcuboot_multi/src/
Dmain.c32 struct flash_pages_info page; in _test_request_upgrade_n() local
40 ret = flash_get_page_info_by_offs(sf_dev, fa->fa_size - 1, &page); in _test_request_upgrade_n()
41 ret = flash_erase(sf_dev, page.start_offset, page.size); in _test_request_upgrade_n()
77 struct flash_pages_info page; in _test_write_confirm_n() local
88 ret = flash_get_page_info_by_offs(sf_dev, fa->fa_size - 1, &page); in _test_write_confirm_n()
91 ret = flash_erase(sf_dev, page.start_offset, page.size); in _test_write_confirm_n()
/Zephyr-Core-2.7.6/doc/guides/arch/
Dx86.rst9 This page contains information on certain aspects when developing for
15 During very early boot, page tables are loaded so technically the kernel
36 possible as the page table generation script
38 at the page directory level, in addition to mapping virtual addresses
40 the entries for identity mapping at the page directory level are
45 is done at the page directory level, there is no need to allocate
46 additional space for the page table. However, additional space may
47 still be required for additional page directory table.
52 required as the entries in page directory table will be cleared.
79 The page table generation script (:file:`arch/x86/gen_mmu.py`) generates
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/Zephyr-Core-2.7.6/subsys/storage/stream/
Dstream_flash.c50 struct flash_pages_info page; in settings_direct_loader() local
58 &page); in settings_direct_loader()
63 ctx->last_erased_page_start_offset = page.start_offset; in settings_direct_loader()
80 struct flash_pages_info page; in stream_flash_erase_page() local
82 rc = flash_get_page_info_by_offs(ctx->fdev, off, &page); in stream_flash_erase_page()
88 if (ctx->last_erased_page_start_offset == page.start_offset) { in stream_flash_erase_page()
92 LOG_DBG("Erasing page at offset 0x%08lx", (long)page.start_offset); in stream_flash_erase_page()
94 rc = flash_erase(ctx->fdev, page.start_offset, page.size); in stream_flash_erase_page()
99 ctx->last_erased_page_start_offset = page.start_offset; in stream_flash_erase_page()
/Zephyr-Core-2.7.6/doc/
D404.rst14 Sorry, the page you requested was not found on this site.
20 document.write("<p>Sorry, the page you requested: " +
24 document.write("<p>Sorry, the page you requested was not found on this site.</p>")
31 It's also possible we've removed or renamed the page you're looking for.
33 Please try using the navigation links on the left of this page to navigate
/Zephyr-Core-2.7.6/subsys/demand_paging/eviction/
DKconfig18 bool "Not Recently Used (NRU) page eviction algorithm"
20 This implements a Not Recently Used page eviction algorithm.
22 When a page frame needs to be evicted, the algorithm will prefer to
23 evict page frames using an ascending order of priority:
38 pages that are capable of being paged out. At eviction time, if a page
/Zephyr-Core-2.7.6/samples/subsys/usb/webusb/
DREADME.rst17 based web application (web page) running in the browser at host.
43 This sample application requires latest Google Chrome, a web page
45 http server running on localhost to serve the web page.
48 only to secure origins. This means the web page/site that used to
55 #. Implement a web app (web page) using WebUSB API and run
60 This sample web page demonstrate how to create and use a WebUSB
66 #. To host the demo page locally: Clone the repo and start a web server
77 to open demo page.
78 Note that at the moment WebUSB landing page notification is disabled
/Zephyr-Core-2.7.6/include/arch/x86/ia32/scripts/
Dshared_kernel_pages.ld10 /* Special page containing supervisor data that is still mapped in
11 * user mode page tables. IDT, GDT, TSSes, trampoline stack, and
12 * any LDT must go here as they always must live in a page that is
56 "shared kernel area is not one memory page");
/Zephyr-Core-2.7.6/drivers/neural_net/
Dintel_gna.c128 uint32_t page; in intel_gna_setup_page_table() local
153 for (page = 0U; page < GNA_NUM_PAGES(size); page++) { in intel_gna_setup_page_table()
190 for (int page = 0; page < GNA_CONFIG_DESC_PG_DIR_SIZE; page++) { in intel_gna_initialize() local
191 page_dir_entry = (page < GNA_NUM_PG_TABLES_NEEDED) ? in intel_gna_initialize()
192 GNA_PG_DIR_ENTRY(&gna_page_table[page]) : (uint32_t)-1; in intel_gna_initialize()
193 gna_config_desc.pagedir[page] = page_dir_entry; in intel_gna_initialize()
195 DEV_NAME(dev), page, gna_config_desc.pagedir[page]); in intel_gna_initialize()
/Zephyr-Core-2.7.6/drivers/audio/
Dtlv320dac310x.c209 if (dev_data->reg_addr_cache.page != reg.page) { in codec_write_reg()
211 dev_cfg->i2c_address, 0, reg.page); in codec_write_reg()
212 dev_data->reg_addr_cache.page = reg.page; in codec_write_reg()
218 reg.page, reg.reg_addr, val); in codec_write_reg()
228 if (dev_data->reg_addr_cache.page != reg.page) { in codec_read_reg()
230 dev_cfg->i2c_address, 0, reg.page); in codec_read_reg()
231 dev_data->reg_addr_cache.page = reg.page; in codec_read_reg()
237 reg.page, reg.reg_addr, *val); in codec_read_reg()
/Zephyr-Core-2.7.6/subsys/usb/class/
Dmsc.c118 static uint8_t __aligned(4) page[BLOCK_SIZE + CONFIG_MASS_STORAGE_BULK_EP_MPS];
217 (void)memset(page, 0, sizeof(page)); in msd_init()
386 &page[addr % BLOCK_SIZE], n, NULL) != 0) { in thread_memory_read_done()
421 &page[addr % BLOCK_SIZE], n, NULL); in memoryRead()
646 if (disk_access_read(disk_pdrv, page, addr/BLOCK_SIZE, 1)) { in memoryVerify()
653 if (page[addr%BLOCK_SIZE + n] != buf[n]) { in memoryVerify()
683 page[addr % BLOCK_SIZE + i] = buf[i]; in memoryWrite()
768 memmove(page, &page[BLOCK_SIZE], overflowed_len); in thread_memory_write_done()
923 page, (addr/BLOCK_SIZE), 1)) { in mass_thread_main()
932 page, (addr/BLOCK_SIZE), 1)) { in mass_thread_main()
/Zephyr-Core-2.7.6/samples/drivers/spi_flash_at45/
DREADME.rst21 enables the flash page layout API which allow show the flash information.
25 page erasing, as it is not needed in this case. This can be modified by
58 To build and flash with flash page layout enabled:
67 Finally, to build and flash with both device power management and flash page
80 This is a typical output when both device power management and flash page
86 Using DATAFLASH_1, chip size: 4194304 bytes (page: 512)
/Zephyr-Core-2.7.6/include/arch/x86/intel64/
Dlinker.ld15 * so that the page permissions can be set in the MMU. Without this,
50 /* Special page containing supervisor data that is still mapped in
51 * user mode page tables. GDT, TSSes, trampoline stack, and
52 * any LDT must go here as they always must live in a page that is
57 * trampoline page.
72 "shared kernel area is not one memory page");
/Zephyr-Core-2.7.6/samples/net/civetweb/websocket_server/
DREADME.rst45 …tp://192.0.2.1:8080/index.html`` It is needed to serve application's main page and its dependencie…
51 - ``/`` - main application page (redirects requests to ``/index.html``)
52 - ``/index.html`` - main application page
53 - ``/index.css`` - main application page style sheet
/Zephyr-Core-2.7.6/arch/x86/zefi/
Defi.ld20 * need to be page-aligned and can be immediately after text/rodata */
23 /* Must be page-aligned or EFI balks */
/Zephyr-Core-2.7.6/samples/drivers/spi_flash_at45/boards/
Dnrf9160dk_nrf9160.overlay23 page-size = <256>;
38 page-size = <512>;
/Zephyr-Core-2.7.6/samples/drivers/flash_shell/src/
Dmain.c590 unsigned long int page, offset, len; in cmd_page_read() local
600 if (parse_ul(argv[1], &page) || parse_ul(argv[2], &len)) { in cmd_page_read()
605 } else if (parse_ul(argv[1], &page) || parse_ul(argv[2], &offset) || in cmd_page_read()
611 ret = flash_get_page_info_by_idx(flash_device, page, &info); in cmd_page_read()
629 unsigned long int i, page, num; in cmd_page_erase() local
637 if (parse_ul(argv[1], &page)) { in cmd_page_erase()
648 ret = flash_get_page_info_by_idx(flash_device, page + i, &info); in cmd_page_erase()
673 unsigned long int page, off; in cmd_page_write() local
683 if (parse_ul(argv[1], &page) || parse_ul(argv[2], &off)) { in cmd_page_write()
699 ret = flash_get_page_info_by_idx(flash_device, page, &info); in cmd_page_write()
/Zephyr-Core-2.7.6/boards/arm/ubx_evkannab1_nrf52832/doc/
Dindex.rst33 can be found at `ANNA-B1 product page`_ and
34 `EVK-ANNA-B1 product page`_.
75 See `EVK-ANNA-B1 product page`_ and `ANNA-B1 Data Sheet`_
136 Refer to the :ref:`nordic_segger` page to learn about debugging boards
165 .. _ANNA-B1 product page: https://www.u-blox.com/en/product/anna-b112-open-cpu
166 .. _EVK-ANNA-B1 product page: https://www.u-blox.com/en/product/evk-anna-b112
/Zephyr-Core-2.7.6/arch/x86/
DKconfig188 This value normally need to be page-aligned.
343 and creates a set of page tables at boot time that is runtime-
347 bool "Use a single page table for all threads"
354 own page tables. Instead, context switching operations will modify
355 page tables in place. This is much slower, but uses much less RAM
356 for page tables.
363 The initial page tables at boot are pre-allocated, and used for the
365 if common page tables are in use requires a pool of free pinned
366 memory pages for constructing page tables.
371 int "Reserve extra pages in page table"
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