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Searched refs:mstatus (Results 1 – 12 of 12) sorted by relevance

/Zephyr-Core-2.7.6/arch/riscv/core/
Dthread.c77 stack_init->mstatus = MSTATUS_DEF_RESTORE; in arch_new_thread()
86 stack_init->mstatus |= MSTATUS_MPRV; in arch_new_thread()
93 stack_init->mstatus |= MSTATUS_FS_INIT; in arch_new_thread()
98 stack_init->mstatus |= MSTATUS_FS_INIT; in arch_new_thread()
238 status = csr_read(mstatus); in z_riscv_user_mode_enter_syscall()
242 csr_write(mstatus, status); in z_riscv_user_mode_enter_syscall()
Dswap.S51 csrrs t0, mstatus, a0
Dreset.S54 csrrs x0, mstatus, t0
Disr.S321 csrr t0, mstatus
476 csrs mstatus, t0
597 csrs mstatus, t0
910 csrrs x0, mstatus, t2
935 csrc mstatus, t0
963 csrw mstatus, t0
993 csrc mstatus, t0
1028 csrw mstatus, t0
Dfatal.c45 LOG_ERR("mstatus: " PR_REG, esf->mstatus); in z_riscv_fatal_error()
/Zephyr-Core-2.7.6/include/arch/riscv/
Darch.h308 ulong_t mstatus; in arch_irq_lock() local
311 : "=r" (mstatus) in arch_irq_lock()
315 key = (mstatus & MSTATUS_IEN); in arch_irq_lock()
325 ulong_t mstatus; in arch_irq_unlock() local
328 : "=r" (mstatus) in arch_irq_unlock()
Dexp.h74 ulong_t mstatus; /* machine status register */ member
/Zephyr-Core-2.7.6/soc/riscv/openisa_rv32m1/
Dwdog.S42 csrrc t0, mstatus, MSTATUS_IEN
62 csrrs x0, mstatus, t0
/Zephyr-Core-2.7.6/soc/riscv/esp32c3/
Dsoc.c54 csr_read_clear(mstatus, MSTATUS_MIE); in __start()
125 csr_read_clear(mstatus, MSTATUS_MIE); in esp_restart_noos()
/Zephyr-Core-2.7.6/soc/riscv/riscv-ite/common/
Dsoc_common.h32 #define SOC_MSTATUS_REG mstatus
/Zephyr-Core-2.7.6/arch/riscv/core/offsets/
Doffsets.c86 GEN_OFFSET_SYM(z_arch_esf_t, mstatus);
/Zephyr-Core-2.7.6/arch/riscv/core/pmp/
Dcore_pmp.c593 csr_clear(mstatus, MSTATUS_MPRV); in z_riscv_configure_stack_guard()
604 csr_set(mstatus, MSTATUS_MPRV); in z_riscv_configure_stack_guard()