| /Zephyr-Core-2.7.6/drivers/dma/ |
| D | dma_nios2_msgdma.c | 50 struct nios2_msgdma_dev_cfg *dev_cfg = in nios2_msgdma_callback() local
55 status = IORD_ALTERA_MSGDMA_CSR_STATUS(dev_cfg->msgdma_dev->csr_base); in nios2_msgdma_callback()
67 dev_cfg->dma_callback(dev_cfg->dev, dev_cfg->user_data, 0, err_code); in nios2_msgdma_callback()
73 struct nios2_msgdma_dev_cfg *dev_cfg = DEV_CFG(dev); in nios2_msgdma_config() local
107 k_sem_take(&dev_cfg->sem_lock, K_FOREVER); in nios2_msgdma_config()
108 dev_cfg->dma_callback = cfg->dma_callback; in nios2_msgdma_config()
109 dev_cfg->user_data = cfg->user_data; in nios2_msgdma_config()
110 dev_cfg->direction = cfg->channel_direction; in nios2_msgdma_config()
115 if (dev_cfg->direction == MEMORY_TO_MEMORY) { in nios2_msgdma_config()
117 dev_cfg->msgdma_dev, &dev_cfg->desc, in nios2_msgdma_config()
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| D | dma_dw.c | 58 const struct dw_dma_dev_cfg *const dev_cfg = DEV_CFG(dev); in dw_dma_isr() local
68 status_intr = dw_read(dev_cfg->base, DW_INTR_STATUS); in dw_dma_isr()
74 status_block = dw_read(dev_cfg->base, DW_STATUS_BLOCK); in dw_dma_isr()
75 status_tfr = dw_read(dev_cfg->base, DW_STATUS_TFR); in dw_dma_isr()
78 status_err = dw_read(dev_cfg->base, DW_STATUS_ERR); in dw_dma_isr()
81 dw_write(dev_cfg->base, DW_CLEAR_ERR, status_err); in dw_dma_isr()
85 dw_write(dev_cfg->base, DW_CLEAR_BLOCK, status_block); in dw_dma_isr()
86 dw_write(dev_cfg->base, DW_CLEAR_TFR, status_tfr); in dw_dma_isr()
122 const struct dw_dma_dev_cfg *const dev_cfg = DEV_CFG(dev); in dw_dma_config() local
187 dw_write(dev_cfg->base, DW_CFG_HIGH(channel), in dw_dma_config()
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| D | dma_sam_xdmac.c | 57 const struct sam_xdmac_dev_cfg *const dev_cfg = DEV_CFG(dev); in sam_xdmac_isr() local
59 Xdmac *const xdmac = dev_cfg->regs; in sam_xdmac_isr()
88 const struct sam_xdmac_dev_cfg *const dev_cfg = DEV_CFG(dev); in sam_xdmac_channel_configure() local
89 Xdmac *const xdmac = dev_cfg->regs; in sam_xdmac_channel_configure()
130 const struct sam_xdmac_dev_cfg *const dev_cfg = DEV_CFG(dev); in sam_xdmac_transfer_configure() local
131 Xdmac *const xdmac = dev_cfg->regs; in sam_xdmac_transfer_configure()
335 const struct sam_xdmac_dev_cfg *const dev_cfg = DEV_CFG(dev); in sam_xdmac_initialize() local
336 Xdmac *const xdmac = dev_cfg->regs; in sam_xdmac_initialize()
339 dev_cfg->irq_config(); in sam_xdmac_initialize()
342 soc_pmc_peripheral_enable(dev_cfg->periph_id); in sam_xdmac_initialize()
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| D | dma_pl330.c | 327 const struct dma_pl330_config *const dev_cfg = DEV_CFG(dev); in dma_pl330_xfer() local
356 dma_pl330_cfg_dmac_add_control(dev_cfg->control_reg_base, in dma_pl330_xfer()
365 ret = dma_pl330_start_dma_ch(dev, dev_cfg->reg_base, channel, in dma_pl330_xfer()
372 ret = dma_pl330_wait(dev_cfg->reg_base, channel); in dma_pl330_xfer()
560 const struct dma_pl330_config *const dev_cfg = DEV_CFG(dev); in dma_pl330_initialize() local
566 channel_cfg->dma_exec_addr = dev_cfg->mcode_base + in dma_pl330_initialize()
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| /Zephyr-Core-2.7.6/drivers/counter/ |
| D | counter_sam_tc.c | 103 const struct counter_sam_dev_cfg *const dev_cfg = DEV_CFG(dev); in counter_sam_tc_start() local
104 Tc *tc = dev_cfg->regs; in counter_sam_tc_start()
105 TcChannel *tc_ch = &tc->TcChannel[dev_cfg->tc_chan_num]; in counter_sam_tc_start()
114 const struct counter_sam_dev_cfg *const dev_cfg = DEV_CFG(dev); in counter_sam_tc_stop() local
115 Tc *tc = dev_cfg->regs; in counter_sam_tc_stop()
116 TcChannel *tc_ch = &tc->TcChannel[dev_cfg->tc_chan_num]; in counter_sam_tc_stop()
125 const struct counter_sam_dev_cfg *const dev_cfg = DEV_CFG(dev); in counter_sam_tc_get_value() local
126 Tc *tc = dev_cfg->regs; in counter_sam_tc_get_value()
127 TcChannel *tc_ch = &tc->TcChannel[dev_cfg->tc_chan_num]; in counter_sam_tc_get_value()
138 const struct counter_sam_dev_cfg *const dev_cfg = DEV_CFG(dev); in counter_sam_tc_set_alarm() local
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| D | counter_gecko_rtcc.c | 105 const struct counter_gecko_config *const dev_cfg = DEV_CFG(dev); in counter_gecko_set_top_value() local
107 if (dev_cfg->prescaler != 1) { in counter_gecko_set_top_value()
230 const struct counter_gecko_config *const dev_cfg = DEV_CFG(dev); in counter_gecko_init() local
238 (RTCC_CntPresc_TypeDef)(31UL - __CLZ(dev_cfg->prescaler)), in counter_gecko_init()
240 (RTCC_CntPresc_TypeDef)CMU_DivToLog2(dev_cfg->prescaler), in counter_gecko_init()
307 dev_cfg->irq_config(); in counter_gecko_init()
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| /Zephyr-Core-2.7.6/drivers/serial/ |
| D | uart_xlnx_ps.c | 227 const struct uart_xlnx_ps_dev_config *dev_cfg = DEV_CFG(dev); in set_baudrate() local
233 baud = dev_cfg->baud_rate; in set_baudrate()
234 clk_freq = dev_cfg->uconf.sys_clk_freq; in set_baudrate()
269 reg_base = dev_cfg->uconf.regs; in set_baudrate()
286 const struct uart_xlnx_ps_dev_config *dev_cfg = DEV_CFG(dev); in uart_xlnx_ps_init() local
290 reg_base = dev_cfg->uconf.regs; in uart_xlnx_ps_init()
313 set_baudrate(dev, dev_cfg->baud_rate); in uart_xlnx_ps_init()
321 dev_cfg->uconf.irq_config_func(dev); in uart_xlnx_ps_init()
340 const struct uart_xlnx_ps_dev_config *dev_cfg = DEV_CFG(dev); in uart_xlnx_ps_poll_in() local
344 reg_base = dev_cfg->uconf.regs; in uart_xlnx_ps_poll_in()
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| D | uart_mchp_xec.c | 205 const struct uart_xec_device_config * const dev_cfg = DEV_CFG(dev); in set_baud_rate() local
207 struct uart_regs *regs = dev_cfg->regs; in set_baud_rate()
211 if ((baud_rate != 0U) && (dev_cfg->sys_clk_freq != 0U)) { in set_baud_rate()
216 divisor = ((dev_cfg->sys_clk_freq + (baud_rate << 3)) in set_baud_rate()
243 const struct uart_xec_device_config * const dev_cfg = DEV_CFG(dev); in uart_xec_configure() local
244 struct uart_regs *regs = dev_cfg->regs; in uart_xec_configure()
367 const struct uart_xec_device_config * const dev_cfg = DEV_CFG(dev); in uart_xec_init() local
370 ret = z_mchp_xec_pcr_periph_sleep(dev_cfg->pcr_idx, in uart_xec_init()
371 dev_cfg->pcr_bitpos, 0); in uart_xec_init()
382 dev_cfg->irq_config_func(dev); in uart_xec_init()
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| D | uart_ns16550.c | 311 const struct uart_ns16550_device_config * const dev_cfg = DEV_CFG(dev); in set_baud_rate() local
316 if ((baud_rate != 0U) && (dev_cfg->sys_clk_freq != 0U)) { in set_baud_rate()
321 divisor = ((dev_cfg->sys_clk_freq + (baud_rate << 3)) in set_baud_rate()
341 const struct uart_ns16550_device_config * const dev_cfg = DEV_CFG(dev); in uart_ns16550_configure() local
350 ARG_UNUSED(dev_cfg); in uart_ns16550_configure()
354 if (dev_cfg->pcie) { in uart_ns16550_configure()
357 if (!pcie_probe(dev_cfg->pcie_bdf, dev_cfg->pcie_id)) { in uart_ns16550_configure()
362 pcie_probe_mbar(dev_cfg->pcie_bdf, 0, &mbar); in uart_ns16550_configure()
363 pcie_set_cmd(dev_cfg->pcie_bdf, PCIE_CONF_CMDSTAT_MEM, true); in uart_ns16550_configure()
384 uint32_t pcp = dev_cfg->pcp; in uart_ns16550_configure()
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| D | uart_cmsdk_apb.c | 103 const struct uart_device_config * const dev_cfg = DEV_CFG(dev); in baudrate_set() local
110 if ((dev_data->baud_rate != 0U) && (dev_cfg->sys_clk_freq != 0U)) { in baudrate_set()
112 uart->bauddiv = (dev_cfg->sys_clk_freq / dev_data->baud_rate); in baudrate_set()
130 const struct uart_device_config * const dev_cfg = DEV_CFG(dev); in uart_cmsdk_apb_init() local
154 dev_cfg->irq_config_func(dev); in uart_cmsdk_apb_init()
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| /Zephyr-Core-2.7.6/drivers/dac/ |
| D | dac_sam.c | 58 const struct dac_sam_dev_cfg *const dev_cfg = DEV_CFG(dev); in dac_sam_isr() local
60 Dacc *const dac = dev_cfg->regs; in dac_sam_isr()
81 const struct dac_sam_dev_cfg *const dev_cfg = DEV_CFG(dev); in dac_sam_channel_setup() local
82 Dacc *const dac = dev_cfg->regs; in dac_sam_channel_setup()
101 const struct dac_sam_dev_cfg *const dev_cfg = DEV_CFG(dev); in dac_sam_write_value() local
102 Dacc *const dac = dev_cfg->regs; in dac_sam_write_value()
126 const struct dac_sam_dev_cfg *const dev_cfg = DEV_CFG(dev); in dac_sam_init() local
128 Dacc *const dac = dev_cfg->regs; in dac_sam_init()
131 dev_cfg->irq_config(); in dac_sam_init()
139 soc_pmc_peripheral_enable(dev_cfg->periph_id); in dac_sam_init()
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| /Zephyr-Core-2.7.6/drivers/sensor/qdec_sam/ |
| D | qdec_sam.c | 45 const struct qdec_sam_dev_cfg *const dev_cfg = DEV_CFG(dev); in qdec_sam_fetch() local
47 Tc *const tc = dev_cfg->regs; in qdec_sam_fetch()
82 const struct qdec_sam_dev_cfg *const dev_cfg = DEV_CFG(dev); in qdec_sam_configure() local
83 Tc *const tc = dev_cfg->regs; in qdec_sam_configure()
103 const struct qdec_sam_dev_cfg *const dev_cfg = DEV_CFG(dev); in qdec_sam_initialize() local
106 soc_gpio_list_configure(dev_cfg->pin_list, dev_cfg->pin_list_size); in qdec_sam_initialize()
108 for (int i = 0; i < ARRAY_SIZE(dev_cfg->periph_id); i++) { in qdec_sam_initialize()
110 soc_pmc_peripheral_enable(dev_cfg->periph_id[i]); in qdec_sam_initialize()
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| /Zephyr-Core-2.7.6/drivers/i2c/ |
| D | i2c_sam_twihs.c | 109 const struct i2c_sam_twihs_dev_cfg *const dev_cfg = DEV_CFG(dev); in i2c_sam_twihs_configure() local
110 Twihs *const twihs = dev_cfg->regs; in i2c_sam_twihs_configure()
187 const struct i2c_sam_twihs_dev_cfg *const dev_cfg = DEV_CFG(dev); in i2c_sam_twihs_transfer() local
189 Twihs *const twihs = dev_cfg->regs; in i2c_sam_twihs_transfer()
227 const struct i2c_sam_twihs_dev_cfg *const dev_cfg = DEV_CFG(dev); in i2c_sam_twihs_isr() local
229 Twihs *const twihs = dev_cfg->regs; in i2c_sam_twihs_isr()
286 const struct i2c_sam_twihs_dev_cfg *const dev_cfg = DEV_CFG(dev); in i2c_sam_twihs_initialize() local
288 Twihs *const twihs = dev_cfg->regs; in i2c_sam_twihs_initialize()
293 dev_cfg->irq_config(); in i2c_sam_twihs_initialize()
299 soc_gpio_list_configure(dev_cfg->pin_list, dev_cfg->pin_list_size); in i2c_sam_twihs_initialize()
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| D | i2c_sam_twi.c | 109 const struct i2c_sam_twi_dev_cfg *const dev_cfg = DEV_CFG(dev); in i2c_sam_twi_configure() local
110 Twi *const twi = dev_cfg->regs; in i2c_sam_twi_configure()
185 const struct i2c_sam_twi_dev_cfg *const dev_cfg = DEV_CFG(dev); in i2c_sam_twi_transfer() local
187 Twi *const twi = dev_cfg->regs; in i2c_sam_twi_transfer()
240 const struct i2c_sam_twi_dev_cfg *const dev_cfg = DEV_CFG(dev); in i2c_sam_twi_isr() local
242 Twi *const twi = dev_cfg->regs; in i2c_sam_twi_isr()
299 const struct i2c_sam_twi_dev_cfg *const dev_cfg = DEV_CFG(dev); in i2c_sam_twi_initialize() local
301 Twi *const twi = dev_cfg->regs; in i2c_sam_twi_initialize()
306 dev_cfg->irq_config(); in i2c_sam_twi_initialize()
312 soc_gpio_list_configure(dev_cfg->pin_list, dev_cfg->pin_list_size); in i2c_sam_twi_initialize()
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| D | i2c_lpc11u6x.c | 143 const struct lpc11u6x_i2c_config *dev_cfg = DEV_CFG(dev); in lpc11u6x_i2c_slave_register() local
163 dev_cfg->base->addr0 = (cfg->address << 1); in lpc11u6x_i2c_slave_register()
164 dev_cfg->base->con_clr = LPC11U6X_I2C_CONTROL_START | in lpc11u6x_i2c_slave_register()
166 dev_cfg->base->con_set = LPC11U6X_I2C_CONTROL_AA; in lpc11u6x_i2c_slave_register()
177 const struct lpc11u6x_i2c_config *dev_cfg = DEV_CFG(dev); in lpc11u6x_i2c_slave_unregister() local
189 dev_cfg->base->con_clr = LPC11U6X_I2C_CONTROL_AA; in lpc11u6x_i2c_slave_unregister()
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| D | i2c_rv32m1_lpi2c.c | 208 uint32_t clk_freq, dev_cfg; in rv32m1_lpi2c_init() local
231 dev_cfg = i2c_map_dt_bitrate(config->bitrate); in rv32m1_lpi2c_init()
232 err = rv32m1_lpi2c_configure(dev, dev_cfg | I2C_MODE_MASTER); in rv32m1_lpi2c_init()
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| /Zephyr-Core-2.7.6/drivers/audio/ |
| D | tlv320dac310x.c | 81 struct codec_driver_config *const dev_cfg = DEV_CFG(dev); in codec_initialize() local
84 dev_cfg->i2c_device = device_get_binding(dev_cfg->i2c_dev_name); in codec_initialize()
86 if (dev_cfg->i2c_device == NULL) { in codec_initialize()
92 dev_cfg->gpio_device = device_get_binding(dev_cfg->gpio_dev_name); in codec_initialize()
94 if (dev_cfg->gpio_device == NULL) { in codec_initialize()
105 struct codec_driver_config *const dev_cfg = DEV_CFG(dev); in codec_configure() local
116 gpio_pin_configure(dev_cfg->gpio_device, dev_cfg->gpio_pin, in codec_configure()
117 dev_cfg->gpio_flags | GPIO_OUTPUT_INACTIVE); in codec_configure()
206 struct codec_driver_config *const dev_cfg = DEV_CFG(dev); in codec_write_reg() local
210 i2c_reg_write_byte(dev_cfg->i2c_device, in codec_write_reg()
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| /Zephyr-Core-2.7.6/drivers/i2s/ |
| D | i2s_cavs.c | 118 const struct i2s_cavs_config *const dev_cfg = DEV_CFG(dev); in i2s_dma_tx_callback() local
121 volatile struct i2s_cavs_ssp *const ssp = dev_cfg->regs; in i2s_dma_tx_callback()
142 dma_reload(dev_cfg->dev_dma, strm->dma_channel, in i2s_dma_tx_callback()
145 dma_start(dev_cfg->dev_dma, strm->dma_channel); in i2s_dma_tx_callback()
159 i2s_tx_stream_disable(dev_data, ssp, dev_cfg->dev_dma); in i2s_dma_tx_callback()
165 i2s_tx_stream_disable(dev_data, ssp, dev_cfg->dev_dma); in i2s_dma_tx_callback()
174 const struct i2s_cavs_config *const dev_cfg = DEV_CFG(dev); in i2s_dma_rx_callback() local
176 volatile struct i2s_cavs_ssp *const ssp = dev_cfg->regs; in i2s_dma_rx_callback()
202 i2s_rx_stream_disable(dev_data, ssp, dev_cfg->dev_dma); in i2s_dma_rx_callback()
215 dma_reload(dev_cfg->dev_dma, strm->dma_channel, in i2s_dma_rx_callback()
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| D | i2s_sam_ssc.c | 213 const struct i2s_sam_dev_cfg *const dev_cfg = DEV_CFG(dev); in dma_rx_callback() local
215 Ssc *const ssc = dev_cfg->regs; in dma_rx_callback()
254 ret = reload_dma(dev_cfg->dev_dma, stream->dma_channel, in dma_rx_callback()
265 rx_stream_disable(stream, ssc, dev_cfg->dev_dma); in dma_rx_callback()
273 const struct i2s_sam_dev_cfg *const dev_cfg = DEV_CFG(dev); in dma_tx_callback() local
275 Ssc *const ssc = dev_cfg->regs; in dma_tx_callback()
315 ret = reload_dma(dev_cfg->dev_dma, stream->dma_channel, in dma_tx_callback()
326 tx_stream_disable(stream, ssc, dev_cfg->dev_dma); in dma_tx_callback()
329 static int set_rx_data_format(const struct i2s_sam_dev_cfg *const dev_cfg, in set_rx_data_format() argument
332 Ssc *const ssc = dev_cfg->regs; in set_rx_data_format()
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| /Zephyr-Core-2.7.6/drivers/flash/ |
| D | flash_stm32_qspi.c | 109 const struct flash_stm32_qspi_config *dev_cfg = DEV_CFG(dev); in qspi_send_cmd() local
113 ARG_UNUSED(dev_cfg); in qspi_send_cmd()
124 LOG_DBG("CCR 0x%x", dev_cfg->regs->CCR); in qspi_send_cmd()
137 const struct flash_stm32_qspi_config *dev_cfg = DEV_CFG(dev); in qspi_read_access() local
141 ARG_UNUSED(dev_cfg); in qspi_read_access()
174 const struct flash_stm32_qspi_config *dev_cfg = DEV_CFG(dev); in qspi_write_access() local
178 ARG_UNUSED(dev_cfg); in qspi_write_access()
201 LOG_DBG("CCR 0x%x", dev_cfg->regs->CCR); in qspi_write_access()
230 const struct flash_stm32_qspi_config *dev_cfg = DEV_CFG(dev); in qspi_address_is_valid() local
231 size_t flash_size = dev_cfg->flash_size; in qspi_address_is_valid()
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| /Zephyr-Core-2.7.6/drivers/can/ |
| D | can_mcp2515.c | 311 const struct mcp2515_config *dev_cfg = DEV_CFG(dev); in mcp2515_get_core_clock() local
313 *rate = dev_cfg->osc_freq / 2; in mcp2515_get_core_clock()
696 const struct mcp2515_config *dev_cfg = DEV_CFG(dev); in mcp2515_handle_interrupts() local
752 ret = gpio_pin_get(dev_data->int_gpio, dev_cfg->int_pin); in mcp2515_handle_interrupts()
812 const struct mcp2515_config *dev_cfg = DEV_CFG(dev); in mcp2515_init() local
824 if (!spi_is_ready(&dev_cfg->bus)) { in mcp2515_init()
825 LOG_ERR("SPI bus %s not ready", dev_cfg->bus.bus->name); in mcp2515_init()
836 dev_data->int_gpio = device_get_binding(dev_cfg->int_port); in mcp2515_init()
838 LOG_ERR("GPIO port %s not found", dev_cfg->int_port); in mcp2515_init()
842 if (gpio_pin_configure(dev_data->int_gpio, dev_cfg->int_pin, in mcp2515_init()
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| /Zephyr-Core-2.7.6/drivers/sensor/bmg160/ |
| D | bmg160.c | 27 const struct bmg160_device_config *dev_cfg = dev->config; in bmg160_bus_config() local
31 i2c_cfg = I2C_MODE_MASTER | I2C_SPEED_SET(dev_cfg->i2c_speed); in bmg160_bus_config()
39 const struct bmg160_device_config *dev_cfg = dev->config; in bmg160_read() local
47 if (i2c_burst_read(bmg160->i2c, dev_cfg->i2c_addr, in bmg160_read()
67 const struct bmg160_device_config *dev_cfg = dev->config; in bmg160_write() local
75 if (i2c_burst_write(bmg160->i2c, dev_cfg->i2c_addr, in bmg160_write()
95 const struct bmg160_device_config *dev_cfg = dev->config; in bmg160_update_byte() local
103 if (i2c_reg_update_byte(bmg160->i2c, dev_cfg->i2c_addr, in bmg160_update_byte()
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| /Zephyr-Core-2.7.6/drivers/led_strip/ |
| D | ws2812_spi.c | 50 static const struct ws2812_spi_cfg *dev_cfg(const struct device *dev) in dev_cfg() function
96 const struct ws2812_spi_cfg *cfg = dev_cfg(dev); in ws2812_strip_update_rgb()
165 const struct ws2812_spi_cfg *cfg = dev_cfg(dev); in ws2812_spi_init()
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| D | ws2812_gpio.c | 42 static const struct ws2812_gpio_cfg *dev_cfg(const struct device *dev) in dev_cfg() function
107 const uint32_t val = BIT(dev_cfg(dev)->pin); in send_buf()
238 const struct ws2812_gpio_cfg *cfg = dev_cfg(dev); \
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| /Zephyr-Core-2.7.6/drivers/entropy/ |
| D | entropy_stm32.c | 414 const struct entropy_stm32_rng_dev_cfg *dev_cfg; in entropy_stm32_rng_init() local
420 dev_cfg = DEV_CFG(dev); in entropy_stm32_rng_init()
423 __ASSERT_NO_MSG(dev_cfg != NULL); in entropy_stm32_rng_init()
487 (clock_control_subsys_t *)&dev_cfg->pclken); in entropy_stm32_rng_init()
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