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/Zephyr-Core-2.7.6/subsys/task_wdt/
Dtask_wdt.c41 static struct task_wdt_channel channels[CONFIG_TASK_WDT_CHANNELS]; variable
68 for (int id = 0; id < ARRAY_SIZE(channels); id++) { in schedule_next_timeout()
69 if (channels[id].reload_period != 0 && in schedule_next_timeout()
70 channels[id].timeout_abs_ticks < next_timeout) { in schedule_next_timeout()
72 next_timeout = channels[id].timeout_abs_ticks; in schedule_next_timeout()
112 if (bg_channel || channels[channel_id].reload_period == 0) { in task_wdt_trigger()
117 if (channels[channel_id].callback) { in task_wdt_trigger()
118 channels[channel_id].callback(channel_id, in task_wdt_trigger()
119 channels[channel_id].user_data); in task_wdt_trigger()
157 for (int id = 0; id < ARRAY_SIZE(channels); id++) { in task_wdt_add()
[all …]
/Zephyr-Core-2.7.6/samples/boards/intel_s1000_crb/audio/src/
Daudio_core.c38 int audio_core_process_mic_source(int32_t *buffer, int channels) in audio_core_process_mic_source() argument
51 read += channels; in audio_core_process_mic_source()
57 int audio_core_process_host_source(int32_t *buffer, int channels) in audio_core_process_host_source() argument
70 read += channels; in audio_core_process_host_source()
76 int audio_core_process_speaker_sink(int32_t *buffer, int channels) in audio_core_process_speaker_sink() argument
89 write += channels; in audio_core_process_speaker_sink()
95 int audio_core_process_host_sink(int32_t *buffer, int channels) in audio_core_process_host_sink() argument
108 write += channels; in audio_core_process_host_sink()
Daudio_core.h42 int audio_core_process_mic_source(int32_t *buffer, int channels);
43 int audio_core_process_host_source(int32_t *buffer, int channels);
44 int audio_core_process_speaker_sink(int32_t *buffer, int channels);
45 int audio_core_process_host_sink(int32_t *buffer, int channels);
/Zephyr-Core-2.7.6/drivers/adc/
Dadc_mcp320x.c31 uint8_t channels; member
39 uint8_t channels; member
71 if (channel_cfg->channel_id >= config->channels) { in mcp320x_channel_setup()
86 uint8_t channels = 0; in mcp320x_validate_buffer_size() local
90 for (mask = BIT(config->channels - 1); mask != 0; mask >>= 1) { in mcp320x_validate_buffer_size()
91 if (mask & sequence->channels) { in mcp320x_validate_buffer_size()
92 channels++; in mcp320x_validate_buffer_size()
96 needed = channels * sizeof(uint16_t); in mcp320x_validate_buffer_size()
120 if (find_msb_set(sequence->channels) > config->channels) { in mcp320x_start_read()
122 sequence->channels); in mcp320x_start_read()
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Dadc_sam_afec.c52 uint32_t channels; member
127 data->channel_id = find_lsb_set(data->channels) - 1; in adc_sam_start_conversion()
155 data->channels = ctx->sequence.channels; in adc_context_start_sampling()
191 uint32_t channels = sequence->channels; in start_read() local
193 data->channels = 0U; in start_read()
198 if (channels == 0U || in start_read()
199 (channels & (~0UL << NUM_CHANNELS))) { in start_read()
221 while (channels > 0) { in start_read()
222 if (channels & 1) { in start_read()
225 channels >>= 1; in start_read()
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Dadc_npcx.c60 uint16_t channels; member
94 while (data->channels) { in adc_npcx_isr()
95 channel = find_lsb_set(data->channels) - 1; in adc_npcx_isr()
106 data->channels &= ~BIT(channel); in adc_npcx_isr()
122 uint8_t channels = 0; in adc_npcx_validate_buffer_size() local
127 if (mask & sequence->channels) { in adc_npcx_validate_buffer_size()
128 channels++; in adc_npcx_validate_buffer_size()
132 needed = channels * sizeof(uint16_t); in adc_npcx_validate_buffer_size()
153 inst->ADCCS = data->channels; in adc_npcx_start_scan()
175 if (!sequence->channels || in adc_npcx_start_read()
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Dadc_mchp_xec.c61 adc_regs->single_reg = ctx->sequence.channels; in adc_context_start_sampling()
127 if (chan_mask & sequence->channels) { in adc_xec_validate_buffer_size()
152 if (sequence->channels & ~BIT_MASK(MCHP_ADC_MAX_CHAN)) { in adc_xec_start_read()
153 LOG_ERR("Incorrect channels, bitmask 0x%x", sequence->channels); in adc_xec_start_read()
157 if (sequence->channels == 0UL) { in adc_xec_start_read()
224 uint32_t channels = adc_regs->status_reg; in xec_adc_get_sample() local
225 uint32_t ch_status = channels; in xec_adc_get_sample()
235 bit = find_lsb_set(channels); in xec_adc_get_sample()
242 channels &= ~BIT(idx); in xec_adc_get_sample()
243 bit = find_lsb_set(channels); in xec_adc_get_sample()
Dadc_mchp_xec_v2.c81 adc_regs->single_reg = ctx->sequence.channels; in adc_context_start_sampling()
147 if (chan_mask & sequence->channels) { in adc_xec_validate_buffer_size()
172 if (sequence->channels & ~BIT_MASK(MCHP_ADC_MAX_CHAN)) { in adc_xec_start_read()
173 LOG_ERR("Incorrect channels, bitmask 0x%x", sequence->channels); in adc_xec_start_read()
177 if (sequence->channels == 0UL) { in adc_xec_start_read()
244 uint32_t channels = adc_regs->status_reg; in xec_adc_get_sample() local
245 uint32_t ch_status = channels; in xec_adc_get_sample()
255 bit = find_lsb_set(channels); in xec_adc_get_sample()
262 channels &= ~BIT(idx); in xec_adc_get_sample()
263 bit = find_lsb_set(channels); in xec_adc_get_sample()
Dadc_emul.c82 uint32_t channels; member
283 uint8_t channels = 0; in adc_emul_check_buffer_size() local
288 if (mask & sequence->channels) { in adc_emul_check_buffer_size()
289 channels++; in adc_emul_check_buffer_size()
293 needed = channels * sizeof(adc_emul_res_t); in adc_emul_check_buffer_size()
331 if (find_msb_set(sequence->channels) > config->num_channels) { in adc_emul_start_read()
333 sequence->channels); in adc_emul_start_read()
375 data->channels = ctx->sequence.channels; in adc_context_start_sampling()
483 while (data->channels) { in adc_emul_acquisition_thread()
485 unsigned int chan = find_lsb_set(data->channels) - 1; in adc_emul_acquisition_thread()
[all …]
Dadc_cc32xx.c42 uint32_t channels; member
84 data->channels = ctx->sequence.channels; in adc_context_start_sampling()
88 if (ctx->sequence.channels & BIT(i)) { in adc_context_start_sampling()
189 if (!(sequence->channels & BIT(i))) { in cc32xx_read()
250 data->channels &= ~BIT(no); in adc_cc32xx_isr()
256 if (!data->channels) { in adc_cc32xx_isr()
/Zephyr-Core-2.7.6/drivers/counter/
Dcounter_mcux_ctimer.c23 struct mcux_lpc_ctimer_channel_data channels[NUM_CHANNELS]; member
76 if (data->channels[chan_id].alarm_callback != NULL) { in mcux_lpc_ctimer_set_alarm()
85 data->channels[chan_id].alarm_callback = alarm_cfg->callback; in mcux_lpc_ctimer_set_alarm()
86 data->channels[chan_id].alarm_user_data = alarm_cfg->user_data; in mcux_lpc_ctimer_set_alarm()
107 data->channels[chan_id].alarm_callback = NULL; in mcux_lpc_ctimer_cancel_alarm()
108 data->channels[chan_id].alarm_user_data = NULL; in mcux_lpc_ctimer_cancel_alarm()
150 (data->channels[chan].alarm_callback != NULL)) { in mcux_lpc_ctimer_isr()
152 data->channels[chan].alarm_callback; in mcux_lpc_ctimer_isr()
153 void *alarm_user_data = data->channels[chan].alarm_user_data; in mcux_lpc_ctimer_isr()
155 data->channels[chan].alarm_callback = NULL; in mcux_lpc_ctimer_isr()
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/Zephyr-Core-2.7.6/drivers/sensor/mcux_acmp/
Dmcux_acmp.c72 acmp_channel_config_t channels; member
153 data->channels.positivePortInput = val1; in mcux_acmp_attr_set()
154 ACMP_SetChannelConfig(config->base, &data->channels); in mcux_acmp_attr_set()
163 data->channels.plusMuxInput = val1; in mcux_acmp_attr_set()
164 ACMP_SetChannelConfig(config->base, &data->channels); in mcux_acmp_attr_set()
174 data->channels.negativePortInput = val1; in mcux_acmp_attr_set()
175 ACMP_SetChannelConfig(config->base, &data->channels); in mcux_acmp_attr_set()
184 data->channels.minusMuxInput = val1; in mcux_acmp_attr_set()
185 ACMP_SetChannelConfig(config->base, &data->channels); in mcux_acmp_attr_set()
227 val->val1 = data->channels.positivePortInput; in mcux_acmp_attr_get()
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/Zephyr-Core-2.7.6/include/drivers/
Dled_strip.h71 uint8_t *channels,
126 uint8_t *channels, in led_strip_update_channels() argument
131 return api->update_channels(dev, channels, num_channels); in led_strip_update_channels()
/Zephyr-Core-2.7.6/boards/arm/lpcxpresso55s28/
Dlpcxpresso55s28.dts87 * The total number of dma channels available is defined by
90 * of DMA channels, set this property to as many channels is needed
94 dma-channels = <20>;
/Zephyr-Core-2.7.6/drivers/led_strip/
Dlpd880x.c117 uint8_t *channels, in lpd880x_strip_update_channels() argument
123 channels[i] = 0x80 | (channels[i] >> 1); in lpd880x_strip_update_channels()
126 return lpd880x_update(dev, channels, num_channels); in lpd880x_strip_update_channels()
/Zephyr-Core-2.7.6/boards/arm/lpcxpresso55s69/
Dlpcxpresso55s69_ns.dts96 * The total number of dma channels available is defined by
99 * of DMA channels, set this property to as many channels is needed
103 dma-channels = <20>;
Dlpcxpresso55s69_cpu0.dts94 * The total number of dma channels available is defined by
97 * of DMA channels, set this property to as many channels is needed
101 dma-channels = <20>;
/Zephyr-Core-2.7.6/drivers/pwm/
Dpwm_sam0_tcc.c22 uint8_t channels; member
51 if (ch >= cfg->channels) { in pwm_sam0_get_cycles_per_sec()
70 if (ch >= cfg->channels) { in pwm_sam0_pin_set()
151 .channels = DT_INST_PROP(inst, channels), \
/Zephyr-Core-2.7.6/subsys/bluetooth/
DKconfig.iso16 Isochronous channels.
27 Isochronous channels.
32 int "Maximum number of simultaneous ISO channels"
38 Maximum number of simultaneous Bluetooth isochronous channels
65 Maximum MTU for Isochronous channels TX buffers.
79 Maximum MTU for Isochronous channels RX buffers.
/Zephyr-Core-2.7.6/subsys/bluetooth/services/ots/
Dots_l2cap.c40 static sys_slist_t channels; variable
171 SYS_SLIST_FOR_EACH_CONTAINER(&channels, l2cap_ctx, node) { in l2cap_accept()
196 sys_slist_init(&channels); in bt_gatt_ots_l2cap_init()
243 sys_slist_append(&channels, &l2cap_ctx->node); in bt_gatt_ots_l2cap_register()
250 sys_slist_find_and_remove(&channels, &l2cap_ctx->node); in bt_gatt_ots_l2cap_unregister()
/Zephyr-Core-2.7.6/tests/drivers/adc/adc_dma/src/
Dtest_adc.c171 .channels = BIT(ADC_1ST_CHANNEL_ID), in test_task_one_channel()
204 .channels = BIT(ADC_1ST_CHANNEL_ID) | BIT(ADC_2ND_CHANNEL_ID), in test_task_two_channels()
250 .channels = BIT(ADC_1ST_CHANNEL_ID), in test_task_asynchronous_call()
316 .channels = BIT(ADC_1ST_CHANNEL_ID), in test_task_with_interval()
406 .channels = BIT(ADC_1ST_CHANNEL_ID) | BIT(ADC_2ND_CHANNEL_ID), in test_task_repeated_samplings()
408 .channels = BIT(ADC_1ST_CHANNEL_ID), in test_task_repeated_samplings()
439 .channels = BIT(ADC_1ST_CHANNEL_ID), in test_task_invalid_request()
/Zephyr-Core-2.7.6/tests/drivers/uart/uart_async_api/boards/
Datsamr21_xpro.overlay8 /* Configure DMA channels for async operation */
25 /* Configure DMA channels for async operation */
/Zephyr-Core-2.7.6/samples/bluetooth/central_iso/src/
Dmain.c220 static struct bt_iso_chan *channels[1]; in main() local
235 channels[0] = &iso_chan; in main()
236 param.cis_channels = channels; in main()
237 param.num_cis = ARRAY_SIZE(channels); in main()
/Zephyr-Core-2.7.6/doc/reference/task_wdt/
Dindex.rst19 to supervise multiple threads or tasks (called watchdog channels).
30 channels without passing around a context or device pointer in the firmware.
32 The maximum number of channels is predefined via Kconfig and should be adjusted
33 to match exactly the number of channels required by the application.
/Zephyr-Core-2.7.6/doc/reference/peripherals/
Dsensor.rst18 Sensors can have multiple channels, either to represent different axes of
22 three acceleration channels and a temperature one.
26 :ref:`sensor_api_reference` for all supported channels, along with their
40 application instructs the driver to fetch a sample of all its channels.
41 Then, individual channels may be read. In the case of channels with
45 of channels between reads and efficiency of communication by issuing a
51 compensates data for both channels.

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