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Searched refs:base_p (Results 1 – 5 of 5) sorted by relevance

/Zephyr-Core-2.7.6/include/arch/x86/ia32/
Dsegmentation.h243 #define _LIMIT_AND_BASE(base_p, limit_p, granularity_p) \ argument
244 .base_low = (((uint32_t)base_p) & 0xFFFF), \
245 .base_mid = (((base_p) >> 16) & 0xFF), \
246 .base_hi = (((base_p) >> 24) & 0xFF), \
267 #define DT_CODE_SEG_ENTRY(base_p, limit_p, granularity_p, dpl_p, readable_p, \ argument
271 _LIMIT_AND_BASE(base_p, limit_p, granularity_p), \
279 #define DT_DATA_SEG_ENTRY(base_p, limit_p, granularity_p, dpl_p, writable_p, \ argument
283 _LIMIT_AND_BASE(base_p, limit_p, granularity_p), \
291 #define DT_LDT_ENTRY(base_p, limit_p, granularity_p, dpl_p) \ argument
294 _LIMIT_AND_BASE(base_p, limit_p, granularity_p), \
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/Zephyr-Core-2.7.6/boards/xtensa/intel_adsp_cavs15/tools/lib/
Ddriver.py32 self.base_p = 0
35 (self.base_p, self.base_v, self.size) = struct.unpack('=QQL', raw)
41 % (self.base_p, self.base_v, self.size)
Detrace.py27 self.dsp_base_p = dev.dev_info.dsp_bar.base_p
Ddevice.py57 self.hda_bar_mmap = self.drv.mmap(self.dev_info.hda_bar.base_p,
61 self.dsp_bar_mmap = self.drv.mmap(self.dev_info.dsp_bar.base_p,
Dipc.py219 self.dsp_base_p = dev.dev_info.dsp_bar.base_p