1/* 2 * Copyright (c) 2014 Wind River Systems, Inc. 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7/** 8 * @file 9 * @brief Handling of transitions to-and-from regular IRQs (RIRQ) 10 * 11 * This module implements the code for handling entry to and exit from regular 12 * IRQs. 13 * 14 * See isr_wrapper.S for details. 15 */ 16 17#include <kernel_structs.h> 18#include <offsets_short.h> 19#include <toolchain.h> 20#include <linker/sections.h> 21#include <arch/cpu.h> 22#include <swap_macros.h> 23#include <arch/arc/asm-compat/assembler.h> 24 25GTEXT(_rirq_enter) 26GTEXT(_rirq_exit) 27GTEXT(_rirq_newthread_switch) 28 29/* 30 31=========================================================== 32 RETURN FROM INTERRUPT TO COOPERATIVE THREAD 33=========================================================== 34 35That's a special case because: 36 1. We return from IRQ handler to a cooperative thread 37 2. During IRQ handling context switch did happen 38 3. Returning to a thread which previously gave control 39 to another thread because of: 40 - Calling k_sleep() 41 - Explicitly yielding 42 - Bumping into locked sync primitive etc 43 44What (3) means is before passing control to another thread our thread 45in question: 46 a. Stashed all precious caller-saved registers on its stack 47 b. Pushed return address to the top of the stack as well 48 49That's how thread's stack looks like right before jumping to another thread: 50----------------------------->8--------------------------------- 51PRE-CONTEXT-SWITCH STACK 52 53 lower_addr, let's say: 0x1000 54 55 -------------------------------------- 56 SP -> | Return address; PC (Program Counter), in fact value taken from 57 | BLINK register in arch_switch() 58 -------------------------------------- 59 | STATUS32 value, we explicitly save it here for later usage, read-on 60 -------------------------------------- 61 | Caller-saved registers: some of R0-R12 62 -------------------------------------- 63 |... 64 |... 65 66 higher_addr, let's say: 0x2000 67----------------------------->8--------------------------------- 68 69When context gets switched the kernel saves callee-saved registers in the 70thread's stack right on top of pre-switch contents so that's what we have: 71----------------------------->8--------------------------------- 72POST-CONTEXT-SWITCH STACK 73 74 lower_addr, let's say: 0x1000 75 76 -------------------------------------- 77SP -> | Callee-saved registers: see struct _callee_saved_stack{} 78 | |- R13 79 | |- R14 80 | | ... 81 | \- FP 82 | ... 83 -------------------------------------- 84 | Return address; PC (Program Counter) 85 -------------------------------------- 86 | STATUS32 value 87 -------------------------------------- 88 | Caller-saved registers: some of R0-R12 89 -------------------------------------- 90 |... 91 |... 92 93 higher_addr, let's say: 0x2000 94----------------------------->8--------------------------------- 95 96So how do we return in such a complex scenario. 97 98First we restore callee-saved regs with help of _load_callee_saved_regs(). 99Now we're back to PRE-CONTEXT-SWITCH STACK (see above). 100 101Logically our next step is to load return address from the top of the stack 102and jump to that address to continue execution of the desired thread, but 103we're still in interrupt handling mode and the only way to return to normal 104execution mode is to execute "rtie" instruction. And here we need to deal 105with peculiarities of return from IRQ on ARCv2 cores. 106 107Instead of simple jump to a return address stored in the tip of thread's stack 108(with subsequent interrupt enable) ARCv2 core additionally automatically 109restores some registers from stack. Most important ones are 110PC ("Program Counter") which holds address of the next instruction to execute 111and STATUS32 which holds imortant flags including global interrupt enable, 112zero, carry etc. 113 114To make things worse depending on ARC core configuration and run-time setup 115of certain features different set of registers will be restored. 116 117Typically those same registers are automatically saved on stack on entry to 118an interrupt, but remember we're returning to the thread which was 119not interrupted by interrupt and so on its stack there're no automatically 120saved registers, still inevitably on RTIE execution register restoration 121will happen. So if we do nothing special we'll end-up with that: 122----------------------------->8--------------------------------- 123 lower_addr, let's say: 0x1000 124 125 -------------------------------------- 126 # | Return address; PC (Program Counter) 127 | -------------------------------------- 128 | | STATUS32 value 129 | -------------------------------------- 130 | 131 sizeof(_irq_stack_frame) 132 | 133 | | Caller-saved registers: R0-R12 134 V -------------------------------------- 135 |... 136 SP -> | < Some data on thread's stack> 137 |... 138 139 higher_addr, let's say: 0x2000 140----------------------------->8--------------------------------- 141 142I.e. we'll go much deeper down the stack over needed return address, read 143some value from unexpected location in stack and will try to jump there. 144Nobody knows were we end-up then. 145 146To work-around that problem we need to mimic existance of IRQ stack frame 147of which we really only need return address obviously to return where we 148need to. For that we just shift SP so that it points sizeof(_irq_stack_frame) 149above like that: 150----------------------------->8--------------------------------- 151 lower_addr, let's say: 0x1000 152 153 SP -> | 154 A | < Some unrelated data > 155 | | 156 | 157 sizeof(_irq_stack_frame) 158 | 159 | -------------------------------------- 160 | | Return address; PC (Program Counter) 161 | -------------------------------------- 162 # | STATUS32 value 163 -------------------------------------- 164 | Caller-saved registers: R0-R12 165 -------------------------------------- 166 |... 167 | < Some data on thread's stack> 168 |... 169 170 higher_addr, let's say: 0x2000 171----------------------------->8--------------------------------- 172 173Indeed R0-R13 "restored" from IRQ stack frame will contain garbage but 174it makes no difference because we're returning to execution of code as if 175we're returning from yet another function call and so we will restore 176all needed registers from the stack. 177 178One other important remark here is R13. 179 180CPU hardware automatically save/restore registers in pairs and since we 181wanted to save/restore R12 in IRQ stack frame as a caller-saved register we 182just happen to do that for R13 as well. But given compiler treats it as 183a callee-saved register we save/restore it separately in _callee_saved_stack 184structure. And when we restore callee-saved registers from stack we among 185other registers recover R13. But later on return from IRQ with RTIE 186instruction, R13 will be "restored" again from fake IRQ stack frame and 187if we don't copy correct R13 value to fake IRQ stack frame R13 value 188will be corrupted. 189 190*/ 191 192/** 193 * 194 * @brief Work to be done before handing control to an IRQ ISR 195 * 196 * The processor pushes automatically all registers that need to be saved. 197 * However, since the processor always runs at kernel privilege there is no 198 * automatic switch to the IRQ stack: this must be done in software. 199 * 200 * Assumption by _isr_demux: r3 is untouched by _rirq_enter. 201 * 202 * @return N/A 203 */ 204 205SECTION_FUNC(TEXT, _rirq_enter) 206 207/* the ISR will be handled in separate interrupt stack, 208 * so stack checking must be diabled, or exception will 209 * be caused 210 */ 211 _disable_stack_checking r2 212 clri 213 214 /* check whether irq stack is used, if 215 * not switch to isr stack 216 */ 217 _check_and_inc_int_nest_counter r0, r1 218 219 bne.d rirq_nest 220 MOVR r0, sp 221 222 _get_curr_cpu_irq_stack sp 223rirq_nest: 224 PUSHR r0 225 226 seti 227 j _isr_demux 228 229 230/** 231 * 232 * @brief Work to be done exiting an IRQ 233 * 234 * @return N/A 235 */ 236 237SECTION_FUNC(TEXT, _rirq_exit) 238 clri 239 240 POPR sp 241 242 _dec_int_nest_counter r0, r1 243 244 _check_nest_int_by_irq_act r0, r1 245 246 jne _rirq_no_switch 247 248 /* sp is struct k_thread **old of z_arc_switch_in_isr 249 * which is a wrapper of z_get_next_switch_handle. 250 * r0 contains the 1st thread in ready queue. if 251 * it equals _current(r2) ,then do swap, or no swap. 252 */ 253 _get_next_switch_handle 254 255 CMPR r0, r2 256 beq _rirq_no_switch 257 258#ifdef CONFIG_ARC_SECURE_FIRMWARE 259 /* here need to remember SEC_STAT.IRM bit */ 260 lr r3, [_ARC_V2_SEC_STAT] 261 push_s r3 262#endif 263 264 /* r2 is old thread */ 265 _irq_store_old_thread_callee_regs 266 267 /* _thread_arch.relinquish_cause is 32 bit despite of platform bittnes */ 268 _st32_huge_offset _CAUSE_RIRQ, r2, _thread_offset_to_relinquish_cause, r2 269 270 /* mov new thread (r0) to r2 */ 271 MOVR r2, r0 272 273/* _rirq_newthread_switch required by exception handling */ 274.align 4 275_rirq_newthread_switch: 276 277 _load_new_thread_callee_regs 278 279 breq r3, _CAUSE_RIRQ, _rirq_switch_from_rirq 280 nop_s 281 breq r3, _CAUSE_FIRQ, _rirq_switch_from_firq 282 nop_s 283 284 /* fall through */ 285 286.align 4 287_rirq_switch_from_coop: 288 289 /* for a cooperative switch, it's not in irq, so 290 * need to set some regs for irq return 291 */ 292 _set_misc_regs_irq_switch_from_coop 293 294 /* 295 * See verbose explanation of 296 * RETURN FROM INTERRUPT TO COOPERATIVE THREAD above 297 */ 298 299 /* carve fake stack */ 300 SUBR sp, sp, ___isf_t_pc_OFFSET 301 302 303#ifdef CONFIG_ARC_HAS_ZOL 304 /* reset zero-overhead loops */ 305 STR 0, sp, ___isf_t_lp_end_OFFSET 306#endif /* CONFIG_ARC_HAS_ZOL */ 307 308 /* 309 * r13 is part of both the callee and caller-saved register sets because 310 * the processor is only able to save registers in pair in the regular 311 * IRQ prologue. r13 thus has to be set to its correct value in the IRQ 312 * stack frame. 313 */ 314 STR r13, sp, ___isf_t_r13_OFFSET 315 316#ifdef CONFIG_INSTRUMENT_THREAD_SWITCHING 317 PUSHR blink 318 319 bl z_thread_mark_switched_in 320 321 POPR blink 322#endif 323 /* stack now has the IRQ stack frame layout, pointing to sp */ 324 /* rtie will pop the rest from the stack */ 325 rtie 326 327.align 4 328_rirq_switch_from_firq: 329_rirq_switch_from_rirq: 330 331 _set_misc_regs_irq_switch_from_irq 332 333#ifdef CONFIG_INSTRUMENT_THREAD_SWITCHING 334 PUSHR blink 335 336 bl z_thread_mark_switched_in 337 338 POPR blink 339#endif 340_rirq_no_switch: 341 rtie 342
